Yield Engineer

Intel
San Jose, CA 95113
  • Job Code
    JR0178825
Job Description

Intels Programmable Solutions Group (PSG) has an opening for a Yield/Component Debug Engineer focused on post-Silicon product yield and silicon debug.  Are you passionate about solving challenging problems, deep diving into new domains and enjoy a steep learning curve? Then this position is for you. This team resolves critical product yield issues blocking products from meeting production requirements and limiting product cost with a combination of manufacturing and design problem solving expertise, leveraging state of the art methodologies and tools. Large-scale manufacturing is acknowledged as one of the hardest engineering challenges today. Come be a part of this dynamic team consisting of industry-leading and diverse expertise, working to address this critical need to ramp up and increase semiconductor production yields.  As part of this team, you will work closely with leading FPGA test, design and performance architects, failure analysis, fab process yield and reliability teams.

Since inventing the worlds first programmable logic device in 1984,  PSG has been bringing multiple innovations in custom logic solutions to customers. PSG has the best-in-market FPGA with ~2X better fabric performance per watt over the competition, these devices leverage heterogeneous 3D system-in-package technology and 10nm SuperFin Technology. PSG is committed to aggressively expand our position for a broad range of market segments. Yield and Component Debug are critical ingredients to PSG's strategy for success.

Responsibilities of the role include:

  • Identify product yield limiters across all parts of the HVM flow
  • Drive silicon debug to resolve and root-cause product yield issues driving process changes, design updates and test fixes.
  • Lead cross-functional debug taskforces to resolve time-critical issues
  • Collaborate with partner teams to accomplish high quality and cost-effective yield goals for HVM


Qualifications

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Education Requirement

Masters degree in Electrical/Computer/Materials/Chemical Engineering or related degree


Minimum Requirements

  • 3 years of industry experience
  • Understanding of circuits and logic design methodology
  • Basic understanding of device physics
  • Hands-on, self-motivated problem solver.
  • Strong spoken and written communication skills


Preferred Qualifications

  • Experience with statistical analysis packages (JMP, Python, R, Matlab etc)
  • Hardware testing and debug ( ATE)  
  • Scan and Array infrastructure knowledge
  • FPGA Experience
  • Silicon debug experience

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Other Locations

US, Oregon, Hillsboro



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Yield Engineer

Intel
San Jose, CA 95113

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