Xeon SoC Validation Lead/Architect (Principal Engineer)

Intel
Santa Clara, CA 95050
  • Job Code
    JR0155197
Job Description

Xeon Engineering Group XEG leadership team is looking for a principal engineer in Validation with prior SoC or IP pre-silicon Validation experience to join our organization This individual will be responsible for driving overall product quality of Xeon server program(s) through validation strategy, test plans content development and content execution, improving coverage, working with other managers and tech leads within XEG and other partner organizations. This candidate would be expected to effectively interface and influence architects, microarchitects, pre-silicon simulation teams, emulation teams and post-si validation partner teams to define/develop/execute cohesive validation plans to get to high quality Tape-In and PRQ. We also expect this candidate to define new and innovative strategies to shift-left and find HW/FW bugs faster and prior to Tape-In, minimizing any escapes into post-si. The candidate should have a proven track record of delivering exceptional results through hands-on technical involvement either through content development or debug or writing validation strategies. Principal Engineers at Intel are active technical leaders inside and outside the company. Activities include participation in major industry and academic conferences voting membership in international standards committees generation of patents and technical papers. Note: This job code can only be assigned if an employee has participated in an official Technical Leadership Program TLP nomination process for his/her business group. An employee's manager must confirm participation in TLP nomination process prior to job code assignment.

Professional Traits:

  • Exceptional technical leadership skills and technical expertise in solving complex problems through technical TFs and help deliver SoCs and products at a pace faster than prior art.

  • Senior individual who can contribute in the technical reviews of design and mentor other technical leads in the organization and own critical program and technical assessment to senior management.

  • Proven track record of product development from concept all the way through to production.

  • Solid track record of collaboration and building and strengthening partnerships ability to work effectively and influence leads or teams across organizations


Qualifications

The applicant should have a BS, MS or PhD in Electrical or Computer Engineering Science or related field with 15 years of technical experience in silicon design and/or validation/verification.

Some key skills and experience for this technical lead will include:

  • Experience in presi SoC or IP validation

  • Experience in Xeon CPU presilicon or postsilicon validation

  • Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies

Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intels leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

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Xeon SoC Validation Lead/Architect (Principal Engineer)

Intel
Santa Clara, CA 95050

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