Xeon SoC Emulation/Verification Lead

Intel
Santa Clara, CA 95050
  • Job Code
    JR0200579
Job Description
The Xeon Engineering Group (XEG) Emulation Center of Excellence (CoE) is looking for a senior engineer with emulation, SoC validation, and design methodology experience to join our organization. This individual will have technical leadership and technical program management responsibilities to help drive innovations across all areas of CoE operation and beyond to increase design and validation (aka verification) velocity, improve validation effectiveness, and enhance Xeon product quality. The Emulation CoE has responsibility across all Xeon products for emulation model build and bringup, validation capability improvements, IP and feature enabling, emulation SW tools including multiple test generators, and select areas of SoC validation.The successful candidate will need to effectively interface with and influence managers, architects, pre-Si validation teams, RTL designers, and firmware and software teams across multiple organizations to understand major problems, propose solutions, and drive change across Xeon design and validation processes. The goal will be to help improve the quality of design and validation collateral upstream of emulation, negotiate and track requirements and delivery dates from SoC ingredient suppliers, improve emulation processes and capabilities, and ultimately help deliver emulation models more quickly, with higher initial design quality, and with greater capabilities to find deep, silicon-quality bugs. The candidate should have a proven track record of delivering exceptional results through hands-on technical involvement and cross-team collaboration.


Qualifications

The applicant should have a BS, MS or PhD in Electrical/Computer Engineering, Computer Science, or a related field with 12 years of technical experience in SoC design and/or validation/verification.- Experience using hardware emulation to validate SoC designs, preferably with experience building and enabling emulation models.- Experience with SoC design methodologies and processes.- Extensive experience with pre-Si SoC validation methodologies, tradeoffs, and challenges, including multiple programs driven from path finding through production.- Experience integrating and validating RTL with firmware, including BIOS, including technical program management experience with negotiating requirements and delivery dates, tracking deliveries, and ensuring design partners deliver on time and at high quality.- Mindset of continuous improvement with a track record of removing inefficiencies and improving processes across design and/or validation to improve velocity and quality.- Knowledge of C/C++, System Verilog, and scripting languages.

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.



Other Locations

US, Oregon, Hillsboro


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Xeon SoC Emulation/Verification Lead

Intel
Santa Clara, CA 95050

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