Xeon - SoC Design Engineering Manager

Intel
Santa Clara, CA 95050
  • Job Code
    JR0195924
Job Description
XEG (Xeon Engineering Group) is seeking a dynamic leader to drive bold initiatives, innovative transformations, and motivate a large team to deliver Xeon SoC designs for server product leadership through high quality and schedule predictability. XEG manages the competitive design solutions for the entire Xeon Scalable Performance Data Center (DC) portfolio, partnering with the DCAI (Data Center and Artificial Intelligence) group to drive data center roadmap strategies. This Xeon SoC Design Project Manager position is responsible for shaping and delivering the end to end design engineering strategy and execution for leadership server products on a predictable cadence as required by customers. This PM role is part of a worldwide structure in XEG and requires strong collaboration with all XEG global teams to deliver on the critical objectives of quality and security, schedule, performance, and cost. The position reports to the CVP/GM (Corporate Vice-President/General Manager) for XEG in DEG (Design Engineering Group). This position requires a trusted and accountable leader. This is a high profile and high impact position requiring role modeling of Intel cultural values and providing strategic focus on critical areas such as design pathfinding, technical readiness, execution, and talent management. This leader is expected to bring a clear and concise point of view on strategy, goals, and project delivery by leveraging experience and industry knowledge.This position leads and manages a large team on the definition, design, verification, and documentation for Xeon SoC product development, which includes, but is not limited to: Demonstrates leadership managing pre-silicon SoC design teams responsible for definition, design, verification, and documentation of complex SoCs. o Expertise in server microprocessors, micro-architecture design, logic design, and system simulation.o RTL design experience developing design components and IPs; expertise in pre-Si validation. o Experience in delivering global-scale, high-impact, cross-site and cross-group programs in an ever-evolving business environment. o Experience with software, firmware and hardware required to work together for design optimization.o Overall end to end focus on the product design lifecycle through post-silicon. Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a manufacturing ready design database. Analyzes and establishes operation infrastructure, conducting experimental tests and evaluating results as needed. Reviews vendor capability to support SoC development when applicable.Includes: Shapes an organizational environment that promotes innovation, transformation and idea generation. Aligns the team to XEG's overarching and Intel's strategic priorities, while ensuring efficient resourcing aligned to benchmarks and affordability. Positions the team to ensure collaboration, organizational preparedness and on-schedule execution. Delivers Xeon products end to end in collaboration with other XEG teams through all phases of design (i.e., pathfinding, TR, execution, post-si). Collaborates with other Business Units and XEG teams by setting engagement strategies to support product designs. Designs and supports work model changes that affect the SoC/IP to deliver design transformation required for generational efficiencies. Manages a large team while developing strategies to grow critical competencies and skills. Demonstrates executive presence and proven leadership skills when partnering and engaging with Senior leaders. Drives key success indicators to keep executive management apprised of cost, quality, performance, and schedule requirements.


Qualifications

Master of Science or PhD degree in Engineering. Proven track record of leading and delivering successful high complexity products from design to PRQ with high quality and on schedule. 15+ years of experience in leading FE (i.e., Logic, Validation) and BE (i.e., Physical Design) pre-silicon design engineering teams. 10+ years of demonstrated success with senior level, large organization decision making while building respect and influence with multiple stakeholders and customers. 10+ years of demonstrated success with establishing strong cultures and the ability to evolve a culture to achieve critical goals and meet corporate objectives. 10+ years of demonstrated success with strong executive-level communications and presentations skills. Strategic thought leader with deep connections to industry expertise and able to balance strategy, execution, and risk taking.Additional Qualifications: Applies deep knowledge of strong technical, business, and financial expertise (internal and external) for the development of server products. Seamlessly manages ambiguity and complex work situations with multiple stakeholders at all levels. Directs multiple global projects and establishes strong working relationships. Demonstrates high energy, self-motivation and a positive attitude in support of team management and principled influencing skills. Role models exceptional ethical conduct, judgment, and unquestionable integrity aligned to Intel's Code of Conduct. Expects strong accountability to be instilled in the organization at all levels. Leads an organization that is scalable to execute and operationalize strategies focused on continuous learning for themselves and their team.

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

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Xeon - SoC Design Engineering Manager

Intel
Santa Clara, CA 95050

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