Technology Design Enablement Quality and Reliability Engineer

Hillsboro, OR 97123
  • Job Code
Job Description

Technology Design Enablement Quality and Reliability Engineer will work with technology development, design enablement, and design teams to enable competitive reliability design rules, models, and methodologies in PDK (Process Design Kits) and EDA (Electronic Design Automation) tool/flow to support IP (Intellectual Property) and SOC (Silicon on Chip) design on Intel advanced technology nodes for different market segments. This is an entry-level position and will be compensated accordingly.

This role will be responsible but not limited to: 

  • Development and delivery of quality and reliability components and design collaterals with automation in PDK (Process Design Kits) for internal and external IP and product design enablement.
  • Reliability modeling and collateral development for advanced technology features, define technical specifications, and drive the implementation in broad industry EDA tools and flows.
  • Pre-Si reliability verification and Design for Reliability on integrated circuits for multiple reliability mechanisms including device aging, interconnect reliability (Electromigration, High voltage), Self-Heat, ESD (Electro Static Discharge), LU (Latch-Up), SER (Soft Error Reliability), etc. 
  • Conduct circuit level, IP, and SOC level reliability analysis and evaluation for design-technology co-optimization to optimize technology and design flow. Benchmarking EDA tools and flows and drive improvement for design productivity.
  • Pathfinding and development of novel methods and capabilities such as AI (Artificial Intelligence) and ML (Machine Learning) for reliability verification, risk assessment, and PPA (Power Performance Area) optimization.

The ideal candidate should exhibit the following behavioral traits: 

  • Self-motivated, excellent communication skills and skills to excel in a team environment.
  • A 'can-do' attitude to collaborate.
  • Problem-solving, communication, and data analysis skills.


This is an entry-level position and will be compensated accordingly. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience. Position not eligible for Intel immigration sponsorship.

Minimum Qualifications:

  • The candidate must possess a Ph.D. in Electrical Engineering, Electronics, Computer Science or Engineering, Mechanical, Material, and Physics or equivalent.
  • 2+ years of relevant experience in Education on design and circuit simulations, PV Performance Verification, RV Reliability Verification/Physical Design. 

Preferred Qualifications:

  • Device physics of advanced semiconductor technology nodes with an understanding of circuits or interconnect reliability.
  • Experience in device physics/circuit operations.  
  • Knowledge in design methodology (timing noise, physical circuit design, layout). 
  • Familiar with RTL to GDS flow including circuit simulation, extraction, P&R, LVS, and verification.
  • Experience in the area of digital/analog / mixed-signal design tools and flows. 
  • Experience with industry-standard tools such as Virtuoso, Spectre, Hspice, StarRC, QRC, Totem, Redhawk, Voltus, CSRA, PERC, Pathfinder, or similar.
  • Experience with scripting languages such as C/C++, TCL, Perl, or Python. 

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations

US, Arizona, Phoenix;US, California, Santa Clara

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Technology Design Enablement Quality and Reliability Engineer

Hillsboro, OR 97123

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