System Validation Engineer (Memory)

Folsom, CA 95630
  • Job Code
Job Description

The Intel Client Advanced Validation Engineering (CAVE) team is seeking System Validation engineering applicants with a passion for continuous learning, a strong interest in computer architecture, and a tenacity for problem solving. The CAVE team at Intel owns validating Intel's Client SOC products (designed for mobile, desktop and gaming experiences). We have a very dynamic and team-oriented environment. As a System Validation Engineer in CAVE, you will collaborate extensively with Architecture, Design, Firmware, Software and Manufacturing teams.

Your responsibilities will vary throughout the product life cycle, and may include, but are limited to:

  • Developing a deep understanding of pertinent IP hardware and software specifications (x86 Cores, Power Management, Graphics, Imaging, Memory, AI, amongst other technologies)
  • Analyzing use cases and creating test plans
  • Developing and automating content
  • Developing, utilizing, and refining test, coverage, and automation frameworks
  • Developing debug tools and methodologies
  • Debugging test failures using modern lab-based debug and observability solutions

If you have a burning desire to understand how things work and the ability to approach problem solving from many different angles, you will thrive as a System Validation Engineer. Our organization values ramping up new engineers and will place focused effort to enhance your learning through rotation programs that allow for full Intel Client immersion.

In addition to the qualifications listed below the ideal candidate will also have:

  • Excellent analytical and problem-solving skills
  • Strong verbal/written communication skills
  • Effective team player with continuous learning mindset
  • Willingness to balance multiple tasks
  • Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidates must have a Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science with 6+ years of experience in - OR a Master's degree in Electrical Engineering, Computer Engineering or Computer Science with 4+ years of experience in:

  • Knowledge of System Architecture -Hardware-Firmware-Software interfaces
  • Post-Si validation and Silicon debug
  • Lab Tools - Multimeter, Oscilloscope, Waveform Analysis, Protocol Analyzer

Preferred Qualifications: Experience in:

  • Familiar with the latest DDRx and LPx protocols and be able to use debugging tools such as Waveform Analyzers and Hardware Debug hooks to solve problems
  • Broad understanding of multiple computer system ingredients and interface with Architecture, Design, Pre-silicon Validation, Analog and Memory Initialization Firmware teams with the goal to improve post-silicon test content, debug PostSi failing conditions and provide feedback for future SOCs. Broad exposure to Memory sub-system units including memory controller and DDRPHY inclusive of their interaction with SOC (PM, Display, IACore)

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Oregon, Hillsboro

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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System Validation Engineer (Memory)

Folsom, CA 95630

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