System Validation Engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0184799
Job Description

We are looking for an enthusiastic Engineer interested in working with Intel's latest cutting-edge technology. The System Validation Engineer (SVE) will work as part of iVE's (Intel Validation Engineering) Client Functional Validation in Folsom. The Engineer is expected to do hands-on content development and debug in pre/post-Si validation at system level while meeting schedules with quality. This role works in cross-site collaboration with design/architecture/pre-si/FW/SW/BIOS and other post-Si teams to understand technical features, leverage BKMs, and debug HW/SW/FW issues.

In this role responsibilities may include, although not limited to:

  • Create, define and develop system validation environment and test suites
  • Use and apply emulation and system-level tools and techniques to ensure performance to spec
  • Development of methodologies, execution of validation plans, and debug of failures


In addition to the qualifications listed below, the ideal candidate will also have:

  • Excellent analytical and problem-solving skills, a keen eye for bugs and a strong sense of quality
  • Willingness to work well in a cross-site cross-team environment
  • Team player willing to work in a high-paced, dynamic environment


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school-work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

The candidate must have a Bachelors degree in Electrical/Computer Engineering, Computer Science or related field and 3+ years of experience in: - OR - a Masters degree in Electrical/Computer Engineering, Computer Science or related field and 3+ months of experience in/with:

  • Post Silicon Validation
  • Systems Engineering and Computer Architecture
  • C or Python scripting
  • Design verification or validation disciplines
  • System or platform level debug
  • Collaboration with cross functional HW and SW team to solve complex issues



Preferred Qualifications: Experience in/with:

  • Post-silicon debug in PCIe System Power Management domain
  • Debugging in Commercial OS environment

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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System Validation Engineer

Intel
Folsom, CA 95630

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