System Memory Validation Engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0181604
Job Description

The Memory and I/O Technologies Team is excited to announce an opportunity to join our growing team within Intel's Data Platforms Group. MIO works to define and validate DRAM memory and I/O technologies for Intel and we have exciting opportunities to help improve the next generations of DRAM in Folsom, California. The qualified candidate would collaborate with engineering teams in Intel and in the DRAM industry to validate DRAM memory in Intel's server platforms. Were you to join our team, you would work on the cutting edge of DRAM testing with experts at Intel and in the memory industry. Our team members are passionate about growth, innovation, and collaboration and we are looking for individuals who want to learn and grow so we can best support our customers with the highest quality possible. If you have a growth mindset and thrive in an engineering environment, you could be a great fit for our team. On any given day in our development labs, you would test DRAM memory on Intel's platforms using the latest in memory test equipment, collect data across platforms and memory technologies, assess results and collaborate with engineering teams to drive improvements. It will be necessary to continuously keep up to date on emerging DRAM test improvements and apply new learnings to improve internal test processes.

As a memory validation engineer in MIO your responsibilities would include but not limited to:

  • Create memory validation test plans

  • Use platform level tools and techniques to ensure performance to memory specifications

  • Responsible for execution of DDR memory stress tests in system and debug of failures

  • Interface with Architecture, Design, and Validation teams to review and address debug results


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This is an entry level position and it will be compensated accordingly.

Minimum Qualifications:


Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science or related field.


6+ months experience in some of the following areas:

  • Python

  • Performing debug or testing of Intel systems

  • Logic analyzer oscilloscope BERT ITP Lauterbach or other test equipment


Preferred Qualifications:

6+ months of experience in some of the following areas:

  • C coding, database, platform validation, or memory testing

Inside this Business Group

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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System Memory Validation Engineer

Intel
Folsom, CA 95630

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