Substrate Packaging Low Yield Analysis Manager

Intel
Phoenix, AZ 85003
  • Job Code
    JR0181020
Job Description

The Substrate Packaging Engineering TD Manager will lead Low Yield Analysis (LYA) Substrate Packaging activities focused on process and defect characterization projects with the objective of driving yield improvement across Assembly Test Technology Developments (ATTDs) portfolio of substrate packaging technologies. As a manager, you will set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees, and manage performance.

Your main responsibilities include, but are not limited to:
- Lead a team of engineers and engineering technicians to provide substrate platforms with defect and/or process characterization towards identifying key mechanisms that contribute to RC identification
- Work across team boundaries to achieve strategic objectives and meet program deliverables.
- Understand program milestones and schedules then translate into team objectives and drive execution.
- Interface with a wide variety of internal teams, as well as external suppliers to represent the ATTD Yield organization and drive innovation
- Project management, package design and/or development and sustaining support for integrated circuit or semiconductor assemblies, as well as various other electronic components and/or completed units
- Conduct hands-on lab work, define data acquisition strategy and data analysis plan, and recommend corrective actions and/or fixes to internal customers.
- Develop failure analysis innovative techniques and/or approaches to accelerate failure identification and mechanism understanding.
- Provide consultation concerning packaging and/or assembly problems and improvements in the manufacturing process
- Respond to customers' requests or events as they occur.

Candidate should be capable of working effectively across organizational boundaries to deliver the ATTD Yield department vision and objectives.

Candidate must exhibit the following behavioral traits/skills:


-Work with ambiguity and flexibility with respect to job roles and working hours
-Advanced analytical and problem-solving skills
-Communication and presentation skills.


Some domestic and International travel is required (once per Quarter).


Qualifications

You must possess the below minimum qualifications to be initially considered for this position.

Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.


Minimum qualifications:

  • Candidate must possess a Masters degree with 4+ years of experience or a PhD degree with 2+ years of experience in Materials Science and Engineering, Mechanical Engineering, Chemical Engineering Electrical Engineering, or Chemistry and Physics or related field.

3+ years of experience in one or more of the following areas:

  • Experience in a role that demands both daily tactical consistency and longer-term strategic definition and roadmap execution.
  • Team leadership and project management.
  • Apply advanced analytical characterization techniques to industry or graduate research projects.
  • Experience with at least with one of the following: AFM, XRD, TEM, FTIR, Raman, SEM, EBSD.
  • Ability to mentor and coach technical engineers.


Preferred qualifications:

2+ years of experience in the following:

  • Packaging technology knowledge with focus on substrate packaging.
  • Prior Managerial experience.
  • Prior lab management experience.
  • Microscopic techniques STEM in-situ TEM EELS EDS precession microscopy, stress measurements, AFM-IR, fractography.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Substrate Packaging Low Yield Analysis Manager

Intel
Phoenix, AZ 85003

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