Summary
Posted: Mar 19, 2020
Role Number:200160640
Do you love building without precedent? As part of our Digital Design Engineering group, you'll take imaginative and revolutionary...Summary
Summary
Posted: Mar 19, 2020
Role Number:200160640
Do you love building without precedent? As part of our Digital Design Engineering group, you'll take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Your efforts will be groundbreaking, often literally. Join us in an exciting silicon design group that is responsible for crafting state-of-the-art ASICs, and you'll help design the tools that allow us to bring customers experiences they've never before envisioned. We have an extraordinary opportunity for SRAM Compiler Circuit Designers. In the custom digital circuits team, you will implement advanced circuit techniques to improve circuit performance, optimize dynamic/static power and support full bring up through productization. This highly visible role is at the heart of a processor design effort, making a critical impact delivering products to market quickly.
Key Qualifications
Imagine yourself at the center of our hardware development effort! Where you will collaborate with all fields, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers. In this role, you will work on SRAM/memory compiler delivery team collaborating with compiler vendors and design teams, working closely with compiler development and deployment to impact PPA of the end products. Here are the main responsibilities for this role:
- Interact with compiler IP providers outside Apple and understand the compilers available.
- Interact with compiler IP consumers within Apple, understand the memory requirements and communicate to external IP providers.
- Understand the PVT corner requirements for various projects.
- Understand the complete design flow, DFT and testing aspect of the compiler IPs.
Education & Experience
- BSEE / MSEE is required.
Additional Requirements
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