Sr. Principal Electrical Engineer - FPGA ASIC Verification

RTN 2 (Raytheon IDMS)
Tucson, AZ 85701
At Raytheon Missiles and Defense, we continue to develop leading technologies to the US military and our allies. We have added power to the worlds most advanced fighter jets with the AMRAAM (Advanced Medium Range Air to Air Missile) and continue to provide state of the art electronics, systems and other capabilities in the areas of sensing; effects; and command, control, communications and intelligence systems; as well as a broad range of mission support services. Behind all our projects, there is a team of talented engineers which we are looking to grow.

Within the Electrical Products team, you will be developing technical solutions to complex problems that require software skills, ingenuity and creativity. As the CDL Department deploys our Universal Verification Methodology (UVM) based verification capability, we need Verification Engineers to participate in the functional verification of ASICs/FPGAs as-needed. You will participate in a multidiscipline team of engineers to create constrained random agents, test benches and tests. Communication and teaming skills are strongly valued in this environment.

We are looking for talented engineers who can quickly learn and incorporate new concepts to provide solutions to complex scenarios using state of the art tools to make the world a safer place.

You will be Responsible for:
  • Designing tests for applications, algorithms, interfaces and subsystems that employ FPGAs and ASICs.
  • Creating models to be used in the verification and validation of interfaces, applications and algorithms for subsystems.
  • Designing verification environments with random constrained or directed test scenarios.
  • Interpreting requirements to develop test environments.
U.S. Citizenship status is required as this position will need a U.S. DoD Security Clearance within 1 year of start date.

Required Skills:
  • US Citizenship required
  • Ten years of experience in the implementation of modern verification environments that include use of constrained-random stimulus and/or use of functional coverage involving UVM.
  • Coding experience with scripting languages such as Perl and Python.
  • Experience with the HVL language System Verilog.
  • Experience in Linux.
  • Experience in configuration management and version control tools such as GitHub or svn, or others.
  • Recent experience in the Agile software development lifecycle.

Desired Skills:
  • Hardware skills and test experience Debugging and troubleshooting design, systems and subsystems.
  • Knowledge of digital signal processing techniques and implementations.
  • Ability to learn and implement new processes, tools and concepts to solve verification and test challenges.
  • Experience working in a team environment.
  • Self-directed Able to complete tasks with minimal oversight.
  • Ability to obtain and maintain a Department of Defense secret clearance

Required Education:
Bachelor of Science degree in Computer Science, Computer Engineering, or Electrical Engineering with a minimum of 10 years of experience

This position requires the successful issuance, transfer or maintenance of any clearances and/or accesses necessary for the position. Non-US citizens may not be eligible to obtain a security clearance. The Defense Industrial Security Clearance Office (DISCO), an agency of the Department of Defense, handles and adjudicates the security clearance process. Security clearance factors include, but are not limited to, allegiance to the US, foreign influence, foreign preference, criminal conduct, security violations and drug involvement. Additional detail regarding security clearance factors can be obtained by accessing the DISCO website at:



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Sr. Principal Electrical Engineer - FPGA ASIC Verification

RTN 2 (Raytheon IDMS)
Tucson, AZ 85701

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