Sr. Field Programable Gate Array Development Engineer

Hillsboro, OR 97123
  • Job Code
Job Description

The Test Solution and Tester Development (TSTD) team designs, develops, and provides a breakthrough massively parallel low-cost test technology for silicon validation and high-volume manufacturing. The TSTD tester includes multiple FPGA devices on various instruments, drivers, and a software stack. The team is central to the organization with interfaces to HW design, SW development which interact with HW, and driver development.

We are currently looking for Sr. FPGA development engineer who will work on developing FPGA logic for next generation instruments technology to support Intel product.

Your responsibilities include but are not limited to:

- Expertise with translating high level architectural requirements into FPGA design.
- RTL design experience on Instruction/Vector Processor and processor operations
- Capable of functional definition, floor-planning, simulation, implementation, and verification of complex FPGA devices comprising a mix of custom RTL, Processors with hard and soft vendor IP cores.
- Work at entire architecture, system level, integrate modules and components while maintaining overall system performance and targets

- FPGA design skill, find and fix hardware implementation bottlenecks, timing closure, latency etc.
- Drive standardized processes during implementations and continuously improve with the team.
- Additional duties include FPGA debug and sustaining supports

Candidate must exhibit clear written and verbal communication skills.


You must possess the below minimum qualifications to be initially considered for this position.

Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum qualifications:

  • Candidate must possess a Bachelors degree with 3+ years of experience or Masters degree with 2+ years of experience or PhD degree in Computer Science or Computer Engineering, or Electrical Engineering.
  • 5+ years of experience in FPGAs logic development and verification.

1+ years of experience in the following:

  • RTL coding using System Verilog, Verilog/VHDL and in all phases of FPGA development including automated self-checking test benches
  • High speed digital bus interfaces, such as PCIe, USB, DDR3/4, LPDDR3/4 and working knowledge of digital control interfaces such as SPI, I2C etc.
  • Scripting languages such as Tcl, Perl, and Python.
  • C, C++, Python and system interaction in all phases of FPGA based development including automated self-checking test benches.

Preferred qualifications:

  • 1+ years of experience in Intel PSG (Altera) tools such as Quartus.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Sr. Field Programable Gate Array Development Engineer

Hillsboro, OR 97123

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