SOC Power and Performance Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0164134
Job Description

In this position you will be a member of the Data Center Design Power and Performance DCD PnP team. The DCD PnP team is responsible for projecting and optimizing the power binsplit thermals and power limited performance for Data Center products including Xeon Xeon D and Atom-based SoCs. We offer exciting opportunities to develop technical depth and leadership.

Role responsibilities include but are not limited to

  • Lead pre-silicon SoC Power projections for a Data Center product
  • Identify and drive power and thermal optimizations to meet SOC PnP goals
  • Build and maintain a power model using architectural design and process specifications historical power data and current generation power estimates
  • Define segment-specific workloads for power and thermal specifications
  • Influence product definition starting from Pathfinding and Technology Readiness
  • Set workload based power targets for IPs and SoCs that support the market requirements and drive teams to meet these goals
  • Deliver power data to partners to enable power delivery design thermal modeling and performance optimization
  • Audit power estimate quality from IP and SoC teams
  • Drive improvements to IP and SOC PnP methodology
  • Participate in SKU definition to match PnP capabilities with manufacturing and marketing needs
  • Collaborate worldwide with DCD PnP and cross-functional partner teams including SOC and IP Design Architecture Performance Power Management Power Delivery Marketing Planning and Process


The ideal candidate will also demonstrate the following traits:

  • Skilled in effective communication leadership and teamwork
  • Analytically-driven with strong problem solving skills
  • A resourceful and disciplined self-starter
  • Thorough and detail-oriented


Qualifications

Minimum Requirements

The candidate must have a Bachelors degree in Electrical/Computer Engineering and 6+ years of experience with/in:

  • PreSi power analysis and modeling
  • Poweraware design and identification of architectural logical and physical power reduction opportunities
  • Power performance tradeoffs and optimizations
  • Industry standard power estimation tools and Intels design environment
  • Programming or scripting, preferably in perl python or TCL
  • General computer architecture and silicon concepts
  • Thermal modeling and thermal spec for SoCs

Inside this Business Group

Xeon Performance Group (XPG) delivers custom server SoC design solutions to our data center customers. It is chartered to deliver data centric silicon that is high-performing, cost-effective, high-quality, and on schedule in way that increases market share and drives the best solutions for our customers.



Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, Oregon, Hillsboro;US, Texas, Austin



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SOC Power and Performance Engineer

Intel
Santa Clara, CA 95050

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