SoC/Memory System Architect

Intel
Austin, TX 78701
  • Job Code
    JR0185772
Job Description

Intel's Ethernet Products Group is looking for a SoC architect with experience in Memory system architecture for its next generation, advanced SmartNIC/Infrastructure Processing Unit products. The SoC architect will be responsible for the architecture of, and provide uarchitecture and implementation oversight for, various aspects of the SoC, compute, and memory subsystem solution including IP selection, configuration, performance, power, and area.

Responsibilities will include, but are not limited to:

  • Developing architecture specifications.

  • Defining and documenting functional requirements and functional interfaces.

  • Defining and documenting the memory controller and memory subsystem configuration and partitioning.

  • Collaborating with SoC architects, mirco-architects, verification, performance modeling, physical design, packaging, signal integrity, platform and performance validation team, and 3rd party IP vendors.

  • Defining the configuration of 3rd party memory controller and PHY IP components to meet the overall program performance, power, and area objectives.

  • Defining the configuration of 3rd party compute system IP components to meet the overall program performance, power, and area objectives.

  • Determining, specifying, and evaluating the viability of complex hardware features and structures and ensures that software and hardware designs interface correctly.

  • Designing the framework for particular functions.

  • Defining, documenting, and testint processes for inclusion into technical platforms, subsystem specifications, input/output and working parameters for hardware and/or software compatibility.

  • Identifying, analyzing, and resolving subsystem and/or SoC design weaknesses.

  • Influencing the shaping of future products by significantly contributing to the architecture used across design families.

  • Providing multilayered technical expertise for next generation initiatives.


The ideal candidate will have the following skills in addition to the qualifications listed below.

  • Have a good balance of overall system architecture experience and memory controller/subsystem architecture experience with expertise in AMBA 4/5 AXI/ACE/CHI (or analogous coherent bus protocols), DDR4/5, LPDDR4/5, HBM, CMN, MMU, GIC, CCIX and/or CXL.

  • Must be a team player, with a demonstrated experience technically influencing others.

  • Strong problem-solving skills.

  • Excellent verbal and written communication skills.


In this position you will gain invaluable experience which will allow growth and expanded opportunities within this business group as well as future possible opportunities with other business groups within Intel.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 9 years of industry work experience, or

  • Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6 years of industry work experience, or

  • PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4 years of related work experience.


Minimum Required Qualifications:

  • 9 plus years of experience and background in Computer Architecture and the following:

  • Advanced bus protocols (supporting cache and IO coherency) and memory consistency models.

  • Solid understanding of PCIe ordering and relaxed ordering models.

  • Coherent interconnect architecture and uarchitecture for large scale systems: ring architecture, mesh architecture, deadlock avoidance, load balancing, etc.

  • System level cache (i.e. L3 cache) architecture and uarchitecture for large scale systems.

  • LPDDR, DDR, and HBM memory controller and subsystem architecture for large scale systems.

  • Expertise in x86 or ARM processor core and/or SoC architecture trade-offs.

  • Verilog/System Verilog RTL design, verification, and debug.


Additional Preferred Qualifications:

  • Master's Degree or higher.

  • CCIX and/or CXL experience.

  • Arm v8.x ISA and Arm SBSA experience.

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.



Other Locations

US, California, Santa Clara



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

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SoC/Memory System Architect

Intel
Austin, TX 78701

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