SoC Design Verification engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0202280
Job Description

Our High Speed IO group is looking for a dynamic design verification engineer working on next gen DDR phy validation. The candidate should Develop preSilicon functional validation tests to verify system will meet design requirements. Create test plans for RTL validation, defining and running simulation models, and finding and implementing corrective measures for failing RTL tests. Analyze and use results to modify testing.


Qualifications

Minimum Qualifications:
�Candidate must possess a Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 3+ years experience OR a Masters degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 1+ years experience in the following:


�Experience with pre-Si verification with System Verilog
OVM/UVM on content development
�Scripting languages such as Python or Perl
�Good understanding of RTL and Verilog

Preferred Qualifications:
�Experience with Synopsys simulation and coverage tools
�OVM and UVM methodologies
�Assertion based verification

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SoC Design Verification engineer

Intel
Folsom, CA 95630

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