SoC Design Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0197655
Job Description

Join us in the Intel Xeon Server SoC Front End Team, designing the latest generation of high performance data center SoCs. You will get to work on cutting edge designs and advanced design methodologies and processes. The group is looking for a highly motivated SOC Design Engineer to join the frontend design team for the next generation of Xeon processor.

 

In this role, as part of the Xeon Server Front End Team, responsibilities include (but not limited to):

  • Working with IP and SoC teams to ensure content and quality of design collateral provided to Physical Design and other cross-functional teams to meet project milestone requirements
  • Performs aspects of the SoC handoff to backend flow including synthesis, quality checks (front and back end), timing and power to qualify a design database that is ready for consumption by the physical design team
  • Working with cross-functional teams to ensure front end designs are delivered on time, and with highest quality, by incorporating proper quality checks at every stage of the design process
  • Analyzes tools and methodologies to establish operation infrastructure, conducts experimental tests, and evaluates results
  • May also review vendor capability to support development
  • Responsible for implementing and maintaining the front end power flow for various components of and including the SOC and liaising with multiple stakeholders
  • Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs
  • Work with 3rd party Vendor tools and representatives and Intel's design automation team to enable project flows

 

Behavioral traits we are looking for:

  • Being proactive and taking initiatives in leading technical activities.
  • Good verbal and written communication skills.
  • Ability to work with cross-functional teams


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications


Bachelor's degree in Electrical/Computer Engineering, Computer Science or related field with 4+ years of relevant experience. Or a Master's degree in Electrical/Computer Engineering, Computer Science or related field with 3+ years of relevant experience.

Your experience should be in the following:

  • Experience in VLSI/RTL design
  • Experience with Synthesis and vendor tools, scripting
  • Experience in SoC Design

 

Preferred Qualifications:

  • Experience with handing off RTL to physical design team
  • Experience in logic design and physical implementation
  • Understanding of IP integration in SOC
  • Formal Equivalence and tools
  • Timing constraints and tools such as PrimeTime, Fishtail

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SoC Design Engineer

Intel
Santa Clara, CA 95050

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