SoC Design Engineer

Santa Clara, CA 95050
  • Job Code
Job Description

Join us in the Intel Xeon Server SoC Front End Team, designing the latest generation of high performance data center SoCs. You will get to work on cutting edge designs and advanced design methodologies and processes. Performing various aspects of the SoC design implementation flow from high-level design to synthesis, timing and power to create a design database that is ready for use by the back-end team. Working with IP and SoC teams to ensure content and quality of design collateral provided to Physical Design, and other cross-functional teams, to make sure they meet project milestone requirements. Involved in various aspects of design, verification, and documentation for SoC (System on a Chip) development. Performing Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributing to potentially own the cross-functional implementation and maintenance of the front end power flow for various components of and including the SOC.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job.


Minimum Qualifications

Bachelor's in Electrical/Computer Engineering, Computer Science or related field with 3+ years of relevant experience. OR a Master's degree in Electrical/Computer Engineering, Computer Science or related field.

Your experience will be in the following:

  • VLSI/ RTL design fundamentals
  • Scripting language: Python or Perl or TCL, Verilog


Preferred Qualifications:

  • Experience with handing off RTL to physical design team
  • Experience in SoC design
  • Experience in logic design and physical implementation
  • Experience with Synthesis and vendor tools
  • Formal Equivalence and tools such as Candence, primetime
  • Timing constraints and tools such as Fishtail
  • Understanding of IP integration in SOC

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SoC Design Engineer

Santa Clara, CA 95050

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