SOC Design Engineer

San Jose, CA 95113
  • Job Code
Job Description

You will be part of the Intel Chief Technology Officer (CTO) design group within the Programmable Solutions Group (PSG), focusing on pathfinding and developing advanced electronic IC and circuit technology to enable our photonic research in the USG program. Our CTO organization delivers critical technology learning and design collaterals to enable future product development.

In this position, you will be responsible for driving and coordinating with cross-functional and cross-geography teams to complete top-down milestones.
You will work closely with the substrate design team, manufacturing team for the design and assembly of the Multi-Chip Package, as well as technical partner(s) to integrate Intel's field-programmable gate array (FPGA) and IP from our program's partner. This is where your inputs to those teams are critical as you hold the key knowledge cross functionally.
You also are the bridge between our program's platform team and the substrate design team and MCP assembly team to make sure all technical requirements from those teams are met in the project. This position will also have strong analytical experience, problem-solving, and communication skills: identifying, isolating, debugging issues, and providing creative solutions.


Minimum Education Requirement:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field

Minimum Required Qualifications:

5+ years semiconductor industry experience in the below area:

  • Experience in high-speed transceiver design and protocols
  • Experience in silicon design and debug tools (digital and/or analog)
  • Experience in silicon + package + board interactions, bring-up, testing, and debug
  • Familiar with Multi-Chip Packaging (MCP) technology and assembly flow
  • Experience in silicon photonic (SiPh) design, packaging, assembly, and manufacturing is a big plus

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SOC Design Engineer

San Jose, CA 95113

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