SoC Design Engineer

Intel
San Jose, CA 95113
  • Job Code
    JR0177839
Job Description

Intel is a global leader, creating world-changing technology that enables progress and enriches live. We are at the intersection of several technology inflections artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology.

This is to fill a position in Programmable Solutions Group (PSG) Custom Technology Engineering (CTE) group. The ideal candidate will be responsible for process technology pathfinding and Field Programmable Gate Array (FPGA) co-optimization for best-in-class perf/watt/cost.

As the SOC Design Engineer, your responsibilities will include but not limited to:

  • Working as a highly proficient technical individual contributor to resolve process, DR and design collateral issues encountered in PSG product execution through cross-organizational collaborations.
  • Participate Design-Technology Co-optimization tasks involving cross-functional and cross-BU teams including Intel and Foundry process technology, product design, package, and business units.
  • Develop and lead test chips tape out to validate critical and unique product design and IPs to improve A0 quality.


Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
 

Minimum Education Requirement

Masters degree in Electrical Engineering or related field.

Minimum Requirements

7+ years of experience in the semiconductor industry in the following areas:

  • Experience in CMOS device physics and experience with transistor and BEOL spice models, DRC and DFM rules for advanced processes (10nm, 7nm, 5nm, and beyond).
  • Experience on digital and analog circuit design/verification.
  • Experience with industry EDA tools including, Hspcie, Spectre, Finesim StarRC, and layout tools including Cadence Virtuoso.
  • Experience with script (Perl, Python, etc.).

Preferred Qualifications

Experience in custom digital design/optimization for low power product, such as APR and PrimeTime. Expertise in circuit place and route optimization for performance, power, and area for products on advanced silicon processes (10nm and beyond).

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Other Locations

US, Oregon, Hillsboro



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SoC Design Engineer

Intel
San Jose, CA 95113

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