SOC Design Engineer - RTL/Logic for Power Management

Hillsboro, OR 97123
  • Job Code
Job Description

Come join Intel's Client Engineering Group responsible for designing Client SoCs that make up more than half of Intel's annual revenue. We envision the future of computing and design for the next generation of laptops and desktop computers. We are looking for a SoC System on Chip Logic Design Engineer ready to research design develop and test lead Intel designs as we reimagine how to build SoCs at Intel and in the semiconductor industry. This role is within Intel's highly regarded Devices Development Group headquartered in Portland Oregon with additional sites in Austin Texas and Penang Malaysia. Our bold purpose as a company is to create world changing technology that enriches the lives of every person on earth and this role is instrumental in furthering our mission to shape the future of technology.

Your responsibilities may include but not be limited to:

  • Create SoC designs for Intel's flagship processors including microarchitecture development and RTL coding for Power Management of Complex SOCs
  • Validate design and microarchitectural implementation and assumptions
  • Automate tasks to complete the design in the most efficient fashion possible
  • Influence project execution and methodology while working with both external and internal tool vendors
  • Design and code RTL for modules containing multiple power and clock domains

In addition to the qualifications below the ideal candidate will also have/be:

  • Self motivator with strong problem solving skills
  • Leadership skills and the willingness to mentor junior designers
  • Interpersonal skills
  • Written and verbal communication skills
  • Willingness to work as part of a team and collaborate in a high paced atmosphere


You must possess the below minimum qualifications to be initially considered for this position Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement

Bachelors with 3 years of experience or Master degree in Electrical, Computer Engineering or relevant engineering field.

Minimum Qualifications
4+ years of experience with design principles and techniques in one or more of the following areas:

  • Microarchitecture definition
  • RTL development
  • Validation development
  • Post silicon test

Preferred Qualifications
8 years of experience with VLSI design techniques.
3 years of experience with architecture of and designs to implement Idle and Active Power management.
2 years of experience with Perl Python or other scripting languages.

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SOC Design Engineer - RTL/Logic for Power Management

Hillsboro, OR 97123

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