SoC Design Engineer - Pre-Silicon IP Validation

Intel
Hillsboro, OR 97123
  • Job Code
    JR0170634
Job Description

Come join Intel's Devices Development Group as a Pre-Silicon System Validation engineer. In this role you will be working as part of a pre-silicon validation team for future Intel SoCs or IPs.

Your responsibilities will include but not be limited to:

  • Validation of an IP at the IP or system level
  • Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code and other tests as a guide
  • Learning the architecture and microarchitecture by debugging failures to the root cause
  • Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
  • Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
  • System level validation tasks such as using FPGAs and emulators
  • Developing high level (for example, System C) modeling for RTL components
  • Developing debugging tools and software


The ideal candidate should exhibit the following behavioral traits:

  • Problem-solving skills
  • Strong written and verbal communication skills
  • Ability to work in a dynamic and team oriented environment


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.


Minimum Requirements
Must have either a Bachelor's or Master's degree in Computer Science, Computer Engineering or Electrical Engineering.
Minimum 3 months experience with reading and interpreting technical specs and Register Transfer Level (RTL) code.
Minimum 3 months experience with writing validation plans and software to implement those validation plans.
Minimum 3 months experience with UNIX or Linux.

Preferred Qualifications
Minimum 6 month experience with computer architecture.
Minimum 6 month experience with IA-32 assembly and/or Verilog programming experience.
Minimum 6 month experience with validation or testing experience, especially in a silicon design team.

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SoC Design Engineer - Pre-Silicon IP Validation

Intel
Hillsboro, OR 97123

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