SoC Design Engineer in Design Automation

Intel
Austin, TX 78701
  • Job Code
    JR0186968
Job Description

In this role responsibilities include, although not limited to:

  • Oversees definition, design, verification, and documentation for SoC (System on a Chip) development
  • Determines architecture design, logic design, and system simulation
  • Defines module interfaces/formats for simulation
  • Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs
  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits
  • Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results
  • May also review vendor capability to support development


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.

Minimum Qualifications:

The candidate must have a Bachelors in Electrical and Computer Engineering or related field.

This position is not eligible for Intel immigration sponsorship

3+ months of experience in:

  • Design principles and techniques in VLSI back-end design, custom-circuit (transistor) design and/or memory design
  • UNIX/Linux environments and Perl/Tcl/Shell/Python scripting
  • RTL Verilog language
  • Backend design EDA tools Synopsys, Cadence and/or Mentor Graphics


Preferred Qualifications:

3+ months of experience in:

  • Design Automation for CPUs or SOCs, including formal verification/logic equivalence checking of gate level and/or transistor level designs (RLS, SPICE) in advanced CMOS processes
  • Industry standard Engineering Design Automation (EDA) VLSI tools from Synopsys/Cadence in one of more of the following: Timing/Power optimization, ECO, Static Timing Analysis, SPICE circuit simulation, statistical variation analysis, noise, cross-talk, OCV and/or ERC flows
  • Machine-learning methods to solve complex problems dealing with automation of circuit design to aid in performance and power improvement
  • Synopsys/Cadence Tcl coding

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SoC Design Engineer in Design Automation

Intel
Austin, TX 78701

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