SoC Design Engineer

Intel
Hudson, MA 01749
  • Job Code
    JR0196813
Job Description

In this position, you will be working alongside a World-class SOC design team within the Xeon Performance Group (XPG) delivering on next-generation Xeon products/IPs for Server markets.

Your responsibilities will include but not be limited to:

  • Block-level floor planning
  • Logic synthesis of design blocks
  • Formal Equivalence Verification FEV
  • Auto Place-and-Route APR using Synopsys ICC tools
  • Timing verification using Synopsys PrimeTime as well as Intel tools
  • Physical verification
  • Layout vs. Schematic LVS, Design Rule Checks DRC, Electrical Rule Checks ERC, and Design for Manufacturability checks DFM
  • Assist in the preparation of the layout design database for introduction to manufacturing

In addition to the qualifications listed below, the ideal candidate will also have:

  • Strong analytical ability, problem solving and communication skills
  • Willing to work independently and at various levels of abstraction


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.


Minimum Qualifications:


Candidate must have a Master's degree in Electrical/Computer Engineering, Computer Science or related computing disciple - OR - a PhD in Electrical/Computer Engineering, Computer Science or related computing disciple with:

  • Coursework and/or project work with CMOS transistor level circuit fundamentals, VLSI hardware design, and programming.


Preferred Qualifications:

  • RTL/Logic design Verilog, VCS, etc.
  • Electronic Design Automation tools, flows and methodology
  • ICCDP, Design Compiler, IC Compiler/ICC, Primetime, VCS, Verilog
  • Layout cleanup expertise DRCs, density, ipc, etc.
  • Circuit design
  • Computer architecture
  • TCL, Perl and/or C++ programming

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SoC Design Engineer

Intel
Hudson, MA 01749

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