SoC Design Engineer

Intel
Austin, TX 78701
  • Job Code
    JR0156701
Job Description

Become a key member of a team participating in the physical design construction, integration and verification of a future Intel CPU. This position requires an Engineer with broad physical design skills, coupled with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU design team.

We are looking for a talented individual to drive the physical design convergence of a Full-Chip (FC) assembly of partitions. As a FC design engineer, you will perform floor-planning, pin and feedthrough planning, repeater insertion, power grid generation, assembly of partitions, push-down partition collateral generation and final physical verification. Given the need for executing multiple projects in parallel, you will be responsible for driving efficiency and quality improvements to the overall FC methodology - including floorplan optimization for better utilization/QoR/runtime and timing and physical aware feedthrough/pin placement. You will also be responsible for coordinating collateral handoffs between the FC Design team and other functions within back-end design such as Clocking, Power Delivery and Partition synthesis/APR. You will drive physical design closure including DRC, LVS, FEV, and reliability verification (IR drop / EM analysis). Also, you will need to work effectively with EDA tools.

The ideal candidate will exhibit the following traits:

  • Work well in a team and be productive under aggressive schedules
  • Excellent written and verbal communications skills
  • Self-motivation and well organized


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Candidate must have a Bachelor degree - OR - a Masters in Electrical Engineering or Computer Engineering

7+ years of experience in:

  • Synthesis/APR flows on multi voltage high frequency designs including custom polygon editing
  • CPU physical design and verification
  • Floor planning
  • Formal equivalence, DRC/LVS, IR and electro-migration checks
  • Tcl scripting


Preferred Qualifications

10+ years of experience with the above skill sets and:

  • Fusion Compiler, ICC2, Calibre, ICV, Conformal, Redhawk

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Other Locations

US, Oregon, Hillsboro



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Before you go...

Our free job seeker tools include alerts for new jobs, saving your favorites, optimized job matching, and more! Just enter your email below.

Share this job:

SoC Design Engineer

Intel
Austin, TX 78701

Join us to start saving your Favorite Jobs!

Sign In Create Account