SOC Design CAD Engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0199971
Job Description

The Product Enablement Solutions Group (PESG) is a worldwide organization that delivers an end-to-end design system for development of IPs, Cores and SOCs. 

This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to deliver a world-class design system that powers Intels leadership products.

What you will be doing:

  • Oversees definition design verification and documentation for SoC System on a Chip development

  • Determines architecture design logic design and system simulation

  • Defines module interfaces formats for simulation

  • Performs Logic design for integration of cell libraries functional units and subsystems into SoC full chip designs Register Transfer Level coding and simulation for SoCs

  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits

  • Performs all aspects of the SoC design flow from high level design to synthesis place and route timing and power to create a design database that is ready for manufacturing

  • Analyzes equipment to establish operation infrastructure conducts experimental tests and evaluates results

  • Reviews vendor capability to support development


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork, classes, research and/or relevant previous job and/or internship experiences

Minimum Qualifications:
The candidate must possess a Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science or related field with 3+ years of relevant work experience; OR a Masters degree in Electrical Engineering, Computer Engineering, Computer Science or related field with experience in the following:

  • Linux or Unix

  • Circuit design and VLSI technology

  • Static/Dynamic timing analysis

  • Scripting languages: Shell scripting Python, TCL, or Perl


Preferred Qualifications:

  • Industry standard construction, synthesis, timing verification, power estimation and optimization tools

  • Exposure to Design Compiler (DC), IC Compiler (ICC2), Fusion Compiler (FC), Genus, or Innovus

Inside this Business Group

The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SOC Design CAD Engineer

Intel
Folsom, CA 95630

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