SOC Debug Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0201862
Job Description
The SOC Debug Engineer role has a single purpose which is to solve our most challenging product issues. SOC Debug Engineers work with our internal product teams (Manufacturing/Validation/Software) and our customer teams during critical escalations to rootcause systemlevel failures and/or anomalies directly impacting our customers or jeopardizing our committed timelines. They are responsible for performing lowlevel and complex debug across multiple IP and system domains within a product, and will use their experience with/understanding of SOC design and architecture, Firmware, Bios and software to completely understand any issue and drive a resolution. They are also expected to drive innovative debug capability improvements through new Design for Debug (DFD), debug tools and scripts to continuously improve the debug discipline


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:The candidate must possess a Bachelor's Degree in Electrical engineering or related field of study with 6+ years of experience DFT on products that went into production or a Master's degree with 4+ years of experience in DFT on products that went into production.6+ years of relevant experience writing scripts and small software programs for automation, using RTL and physical design tools, EDA vendor tools such as scan ATPG, memory BIST, industry DFT practices in HSIO test, PLL test, and debug methods and production test equipment.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.



Other Locations

US, Arizona, Phoenix;US, California, Folsom


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SOC Debug Engineer

Intel
Santa Clara, CA 95050

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