Server SOC RTL Design and Integration Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0170992
Job Description

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates

Minimum Qualifications

The candidate must have a Bachelors degree in ElectricalComputer Engineering or Computer Science and 6 years of experience OR a Masters degree in ElectricalComputer Engineering or Computer Science and 4 years of experience OR a PhD in ElectricalComputer Engineering or Computer Science and 2 years of experience in in the list below:
Design Architecture and Microarchitecture phases of SoC
Workload analysis Use case analysis Performance and Power optimizations explorations and analysis
Architectural modeling of power performance characteristics of complex IPs and SoCs
ASIC design flow EDA tools PrePost Silicon validation process low power methodologies
SoC architectures for Mobile and Computing devices and platforms
Interacting and influencing software and driverfirmware developers to optimize Power and Performance
HDL and SV based design and verification tools and flows

Preferred Qualifications

1 years of experience with
CPU DDR IO systems PCIe Coherency and accelerators

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Server SOC RTL Design and Integration Engineer

Intel
Santa Clara, CA 95050

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