Server Platform Debug HW Architect

Intel
Austin, TX 78701
  • Job Code
    JR0190958
Job Description

Research, recommend, specify and document technology for platforms in support of the organization's strategic vision. Responsible for translating business/customer requirements into platform architecture encompassing hardware, software, SoCs and other components designed to support a variety of systems, solutions and applications.

Design, develop, and analyze overall platform architecture and partitioning between hardware and software to meet use cases and workloads in terms of performance, scalability, manageability, reliability, and security requirements. Leads architectural governance and decisions related to product technology and platform tradeoffs as part of a cross functional architecture decision group. Provide technical direction for platform, SoC and component design activities. Influence the shaping of future products and solutions by significantly contributing to the architecture and technology employed throughout the compute continuum. Provides multilayered technical expertise for next generation initiatives.

This position is not eligible for Intel immigration sponsorship.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a positive factor in identifying top candidates. Requirements listed may be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Requirements:

The candidate must have a Bachelor's degree with 9+ years of industry experience or Master's degree with 6+ years of industry experience in Computer Engineering, Electrical Engineering, or related field.

Minimum qualifications:

5+ years of experience with:

  • Debug experience at platform level and/or component level, this could be software and/or hardware.
  • Debug tools in Lab/Production environments.
  • Technical experience such as SoC Architecture, Memory, RAS (reliability, accessibility, serviceability), and/or PCIe.



Preferred qualifications:

  • Experience with Intel Xeon processor architecture focusing on DFx use cases including early break/patch, security levels etc.
  • Experience with server system architectures including closed chassis, open chassis, scale up, and scale out debug.
  • Experience with debug infrastructure utilized in the industry (JEDEC, IEEE, MIPI).
  • Security technologies such as authentication, cryptography, secure protocols, etc.
  • Platform/SoC architectures focusing on debug technologies such as At-Scale Debug, Direct Chassis DCI, ITP-XDP/Lauterbach, MIPI-PTI , JTAG, SMBus (I2C/I3C) as well as customer specific tools (Asset, Green Hill).

Inside this Business Group

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.



Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, California, Santa Clara;US, Colorado, Fort Collins;US, Oregon, Hillsboro


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$145,650.00-$233,190.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

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Server Platform Debug HW Architect

Intel
Austin, TX 78701

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