Server Platform Debug HW Architect

Intel
Austin, TX 78701
  • Job Code
    JR0180197
Job Description

Come and join a dynamic and challenging team within the Intel Data Platform Group (DPG) focused on engineering developing and supporting world class platforms and component building blocks aligned to DPG's roadmap and strategies.

Join us in our mission to enable breakthrough innovation for cloud computing in Intel's Data Platform Engineering and Architecture group (DPEA).

The Data Center Group Platform Architecture team is seeking an experienced, self-motivated candidate to fulfill the role of Server Platform Architect focusing on Platform Debug Infrastructure.

As a Platform Hardware Architect focusing on the debug Infrastructure (aka bare metal) across all Data Center Group Platforms, your multi segment responsibilities will include:

  • Lead or contribute in the development of new debug interfaces; define use models and complete technical readiness for these technologies.

  • Contribute to or define future platform debug architecture concepts.

  • Comprehend production use models as well as requirements for High Volume Manufacturing (HVM) all in the effort of higher quality.

  • Provide deep analysis and recommendation in specific subsystem architecture areas in support of broader platform debug definition.

  • Support product business and planning teams to complete product feature freeze and final architecture definition.

  • Engage in customer discussions to obtain feedback on specific features or technologies.

  • Drive the platform architectural definition and document the full architecture in the Platform debug Architecture Specifications.

  • Support design engineering teams in product development phase as well as representing platform architecture issues exposed in design, validation, and test.

Behavioral Traits:

  • Interpersonal skills, stakeholder management, communication and influencing skills.

  • Written/oral communication and presentation skills.

  • Demonstrated experience to work with and lead cross-functional technical teams.

  • Assume responsibility and be proactive taking initiative to address issues, set direction and meet commitments.

  • Can identify gaps and impacts, track parallel, often competing issues and stakeholders, set priorities and drive timely resolution with balanced judgment.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a positive factor in identifying top candidates. Requirements listed may be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Requirements:

The candidate must have a Bachelor's degree with 9+ years of industry experience or Master's degree with 6+ years of industry experience in Computer Engineering, Electrical Engineering or related field.

Minimum qualifications:

5+ years of experience with:

  • Debug experience at platform level and/or component level, this could be software and/or hardware.

  • Debug tools in Lab/Production environments.

  • Technical domains such as SoC Architecture, Memory, RAS (reliability, accessibility, serviceability), and/or PCIe.

Preferred qualifications:

  • Experience with Intel XEON processor architecture focusing on DFx use cases including early break/patch, security levels etc.

  • Experience with server system architectures including closed chassis, open chassis, scale up, and scale out debug.

  • Experience with debug infrastructure utilized in the industry (JEDEC, IEEE, MIPI).

  • Security technologies such as authentication, cryptography, secure protocols, etc.

  • Platform/SoC architectures focusing on debug technologies such as At-Scale Debug, Direct Chassis DCI, ITP-XDP/Lauterbach, MIPI-PTI , JTAG, SMBus/I2C/I3C) as well as customer specific tools (Asset, Green Hill).

Inside this Business Group

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.



Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, California, Santa Clara;US, Colorado, Fort Collins;US, Oregon, Hillsboro



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$130,020.00-$195,420.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Before you go...

Our free job seeker tools include alerts for new jobs, saving your favorites, optimized job matching, and more! Just enter your email below.

Share this job:

Server Platform Debug HW Architect

Intel
Austin, TX 78701

Join us to start saving your Favorite Jobs!

Sign In Create Account