Senior Verification Engineer

Folsom, CA 95630
  • Job Code
Job Description

As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services , a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US , Europe and globally. and a world-class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with Arm and RISC-V ecosystem IPs.

Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.


This position provides an exciting opportunity to join the Intel Foundry Services (IFS) silicon solutions engineering (SSE) team focused on developing innovative I/O and SOC products in collaboration with leading data center customers.

A Pre-Si verification engineer owns one or more architectural functional blocks to perform all verification related tasks:
- Create test plan and develop test bench using UVM methodology
- Perform IP and block level coverage driven verification
- Improve existing methodologies to enable effective verification
- Perform Formal Verification, Low Power Verification, Performance Verification, Co-Simulation, Emulation, etc.
- Develop and advance UVM/Formal-based verification architectures and methodologies
- Manage verification regression testing, including results triage and delegating debugging for failed tests
- Mentor and coach members of the team

Minimum Qualifications:
-  Bachelor's degree in Electrical/Computer Engineering or related disciplines with 4+ years of experience in the following area:

  • Develop environments, infrastructure and have end-to-end ownership of writing, refining and executing test plans to accommodate both full chip and standalone block level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessor.

  • Strong background in HDLs and HVL (e.g. System Verilog, OVM, UVM, etc.)

  • Implementation of verification environments that include use of constrained-random stimulus and use of functional coverage

  • IP or SoC development, verification, or integration using Verilog/System Verilog/ Open Verification Methodology (OVM)/Universal Verification Methodology (UVM)

  • Debugging, writing monitors/checkers/reference models / stimulus

Preferred Qualifications:

  •  Linux experience

  • Programming Languages: Python, Perl, C and C++, System C

  • Low Power Verification experience

  • Formal Verification experience

  • Familiarity with NVMe and PCIe is a highly desired

  • Working experience with IP/ASIC/SoC block level or top level verification

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations

Virtual US and Canada

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here
Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here

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Senior Verification Engineer

Folsom, CA 95630

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