Senior Pre-Silicon Verification Engineer

Intel
Phoenix, AZ 85003
  • Job Code
    JR0181757
Job Description

Come and join us! Intel is seeking highly qualified candidates to join our Datacenter and AI group (DCAI) as a Senior Pre-Silicon Verification Engineer!

Our QAT (Quick Assist Technology) hardware design team enables Data Center Technology thru a set of scalable hardware accelerators, like lossless compression, network security like secure key establishment, IPSec, SSL/TLS, and firewall and data center virtualization technology like SRIOV, SIOV and SVM.

Within our QAT team, you will be a member of the CPM (Content Processing Module) IP front end design team, where you will work on verification development and integration activities within the Custom Logic ASIC Engineering group in DCIA.  You will play a key role in the development and integration of CPM IP into Atom and Xeon based SOC. You will work with the IP/SoC integration teams and collaborate with the SoC design, validation, and emulation teams to ensure successful integration and validation of the CPM IP.

Responsibilities will include, but are not limited to:

- Defining, implementing, and deploying verification capabilities, methodologies, and process improvements.

- Development of test-plans, test-bench, BFMs, checkers, trackers, scoreboard, and functional coverage.

- Working closely with design engineers, micro-architects, and other team members to ensure high quality of test-plans, verification environment, and tests.

- Strong discipline and attention to detail in ensuring effective high-quality verification that minimizes bug escapes to higher levels of validation

- Participation in system integration and verification in cooperation with system engineering and development teams to conduct integration/bring-up activities on platforms.

- Technical lead/manager for a small group of Verification engineers to ensure a consistent and comprehensive skills to test leading edge technology platforms.

- Mentorship to other team members on verification BKMs (Best Known Methods) and debug.

The ideal candidate will have the following skills in addition to the qualifications listed below.

- Strong initiative, teamwork, planning, and communication skills as you will be driving new verification capabilities and requirements impacting multiple projects.

- Excellent verbal and written communications skills as well as being results oriented in a team environment.

In this position you will gain invaluable experience that will allow growth and expanded opportunities across Intel.


Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement:

- Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6 years of industry work experience, or

- Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4 years of industry work experience, or

- PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 2 years of related work experience.

Minimum Required Qualifications:

- 6 plus years of experience in System Verilog, solid logic/gate-level design and micro-architecture skills, verification, and test writing.

- 6 plus years of experience with architecting optimized verification environments, experience with cluster and full-chip / System level testing and debug, random test methodology, and test-bench development.

- 4 plus years of experience building complex test-benches and verification infrastructure.

- 4 plus year of experience using SoC tools/methodology (Saola, ACE, VCS, etc.), functional coverage development / analysis, and C/C++ and Perl scripting.

- 4 plus years of experience in System Level Testing, working with all Validation disciplines (Arch, Emulation, SV, and Software).

Additional Preferred Qualifications:

- Master's Degree or higher.

 -Experience in IOSF/PCIE-RAS validation, and knowledge on SRIOV/SIOV and virtualization validation and system requirements/operation.

- 4 plus years of experience defining, implementing, and deploying verification capabilities and methodologies including Formal Property Verification (FPV).

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.



Other Locations

US, California, Folsom;US, Colorado, Fort Collins;US, Texas, Austin



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$110,720.00-$183,250.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

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Senior Pre-Silicon Verification Engineer

Intel
Phoenix, AZ 85003

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