Senior Pre-Si Verification Lead

Intel
Santa Clara, CA 95050
  • Job Code
    JR0197333
Job Description

Responsibilities include, although not limited to:

  • Oversee definition, design, verification, and documentation for SoC (System on a Chip) development
  • Determine architecture design, logic design, and system simulation
  • Define module interfaces/formats for simulation
  • Perform Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs
  • Contribute to the development of multidimensional designs involving the layout of complex integrated circuits
  • Perform all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
  • Analyze equipment to establish operation infrastructure, conduct experimental tests, and evaluate results
  • May also review vendor capability to support development


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 10+ years of experience in: - OR - a Master's degree in Computer/Electrical Engineering or Computer Science and 8+ years of experience in:

  • Verifying complex designs both at the component and full chip level
  • System Verilog based OVM or UVM or related object oriented (OO) and coverage driven ASIC verification methodology
  • Reading and interpreting technical specs and Register Transfer Level (RTL) code
  • Writing validation plans and software to implement them
  • Development of testbench components like Scoreboards, Checkers, Monitors, Drivers.
  • UNIX or Linux



Preferred Qualifications

Experience in:

  • Power Management Computer Architecture
  • Python, C++ and/or Verilog programming
  • Validation or Testing, especially in a Silicon Design team
  • Validation experience on Emulation platforms

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Senior Pre-Si Verification Lead

Intel
Santa Clara, CA 95050

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