Senior Member Technical Staff -- Applications Engineering/SERDES Structured ASIC

Intel
San Jose, CA 95113
  • Job Code
    JR0169950
Job Description

The Application Engineer is primarily a Software Engineer/Developer. Significant contribution also results when the AE acts as a product evangelist, program/project manager and a marketer. Application Engineers act as consultants and provide support to third party product developers. AEs help developers create or move their products to IA, achieve the best performance of their applications on IA, and prepare collateral material to capture methods and demonstrate their results.

Looking for an experienced high-speed SERDES Application and System Engineer to join our team. This position will use your knowledge of high-speed SERDES IP to lead efforts provide the pre-sales demo, post sales technical support and HVM ATE support. It will also need to setup the customer HW/SW platform, characterize, and debug the electrical level issue against the different high-speed protocols such as PCIE Gen1/2/3/4/5 to Ethernet and OIF-CEI standards from 1.25Gbps up to 112Gbps. The position requires the passion to work with customer and self-driven with very good technical knowledge on design and characterization.

As  a Senior Member of Intels Programmable Solutions Group, you play a vital role in applying your knowledge of high-speed SERDES technology to be successful in the following ways: to lead efforts to develop collateral, perform protocol characterization, develop characterization boards, and provide pre and post sales customer support.

As a self-driven technical leader, you must possess a solid knowledge base in design and verification as well as the skill to excel in matters of communication. Furthermore, while our team will depend on your contribution as an Applications Engineer, we will also depend on you as a product evangelist, program/project manager, and technical expert who is determine to achieve successful outcomes. Still interested? Please read the job description indicated below and apply as soon as possible.

Structured ASIC team: 

This is a structured ASIC team under Intels PSG, and is targeting 5G, cloud computing and high end consumer application space. Intel eASIC devices are structured ASICs, an intermediary technology between FPGAs and standard-cell ASICs bridging the gap between FPGA and Custom ASIC. 

Learn more about us:  

https://www.intel.com/content/www/us/en/products/programmable/fpga-vs-structured-asic.html 

https://www.intel.com/content/www/us/en/design/products-and-solutions/structured-asics/overview.html


Qualifications

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
 

Minimum Education Requirement:

  • Bachelors degree in Electrical Engineering, Electrical Electronics or Computer Engineering with 10 years  of experience or
  • Masters degree in Electrical Electronics or Computer Engineering with 7 years of experience


Minimum Requirements:

10+ years of experience in the following areas:

  • Experience in design aspects implementation and applications of high speed SERDES 32G
  • Experience in SERDES and protocols such as PCI Express or 10GBASEKRSRMRERLR 25GBASEKR or JESD204x or CPRIOBSAI or DisplayPort or HDMI or VbyOne, etc.
  • Experience in Communications System Theory as it pertains to SerDes specifically including PLLs and Timing Recovery CDR
  • Experience in SI concepts including sources and causes of noise and jitter
  • Hands on experience with test equipment
  • Experience with SERDES applications characterization
  • Experience in FPGAs SERDES and networking applications
  • Experience in Verilog or VHDL, Perl or Python or Matlab

Preferred Qualifications

  • Experience in analog and digital design
  • Experience with MS Office Suit

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Senior Member Technical Staff -- Applications Engineering/SERDES Structured ASIC

Intel
San Jose, CA 95113

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