Senior Emulation Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0180490
Job Description

As a member of the Pre-Silicon Hardware, Networking and Xeon (PHNX) organization, you will be critical to the future success of Intel's SoC products by delivering the highest quality in our products. Within this organization, you will be part of iVE/PHNX/SEM/Client Emulation team, that is responsible for delivering Intel's Pre-Si Platform System/IP Emulation and Hybrid Emulation platforms critical to enable HW/SW co-design and accelerate time to market for Intel Client Products. You will have the chance to deeply understand overall Silicon Design cycle and the Pre-Silicon platforms and solutions that we develop to improve the health of the ingredients and system components. You will have the chance to learn, develop and improve our Emulation platforms and technologies to accelerate silicon development and improve our products.

Role and Responsibilities:

  • Designing and validating BFMs, RTL/SW transactors needed for emulation
  • Responsible for the modifications to ip, chipset, CPU, full chip RTL to make it emulation friendly
  • Responsible for architecture, design, build and customer enabling of System/IP Level Emulation models
  • Responsible for architecture and design of components that are modelled in the System/IP level Emulation models
  • Responsible for architecture, design of RTL glue logic to make existing RTL work in Emulation platforms
  • Owning model processing (synthesis and/or compile) including determination of model constraints considering factors like clock domain crossings and other
  • Debugging of tough logic failures at system level
  • Working with customers (design and system validation teams) in determining the emulation requirements and also providing the needed support to customers
  • Participating in test plan reviews and provide feedback
  • Participating in the tool development as well as design analysis and debug using vendor tools
  • Defining and developing new capabilities to improve emulation
  • Providing customer debug trainings & ensuring successful project execution
  • Managing technical project deliverables, mentoring junior engineers in the team, and providing innovative solutions to technical challenges


Qualifications

Master of Science in Computer Engineering, Computer Science, or Electrical Engineering.

4+ years of experience within the following:

  • SoC logic design and simulation verification
  • Hardware Description Languages - Verilog, System Verilog
  • Computer Aided Design (CAD) tool development and logicsimulation/emulation.
  • Software programming skills, in C or C++.
  • Linux/UNIX based development environments and tools.
  • Scripting languages Perl and TCL/TK.

Preferred Qualifications:

  • Prior experience in Field Programmable Gate-Array (FPGA) or Emulation modeling techniques
  • Designing and validating Bus Functional Models (BFMs)
  • Coding and Recoding Register Transfer Level (RTL)
  • Building RTL model (synthesis, compile, apply design constraints)
  • Debugging tough logic failures at system level
  • Debugging interfaces like DDR3*, PCI-Express*, and other external/internal buses like SPI, I2C, OCP, UART
  • Working with internal customers (design and system validation teams) to define emulation requirements and also provide needed emulation support to customers
  • Participating in test plan reviews and providing feedback
  • Participating in the tool development as well as design analysis and debugging using vendor tools
  • Defining and developing new capabilities to improve emulation

Inside this Business Group

The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel's product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel's ability to deliver the annual technology platforms in our roadmap.



Other Locations

US, California, Folsom;US, California, Santa Clara



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Senior Emulation Engineer

Intel
Hillsboro, OR 97123

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