Senior DFT Design Engineer

Folsom, CA 95630
  • Job Code
Job Description

Are you passionate about computer graphics and disrupting the industry with your innovation, and working with leading Engineers on Intel's latest GPU/CPU architecture? Do you love collaborating with diverse teams to help achieve Best-In-Class visual experiences that enable Users to immerse themselves in a new visual future?  Then Graphics & Throughput Computing Hardware Engineering (GTCHE) has opportunities for you.  Our Hardware development team designs and validates the future of Processor Graphics engines.


We are looking for a Senior DFT/DFx Design Engineer to join our team, who is ready to make significant impacts in graphics and visual computing.


As an integral member of the Graphics Hardware DFT group, you will be responsible for one or more of the following activities:  

  • Working on the design RTL, GLS, validation automation, and/or timing analysis in the following DFT domains: TAP Controller Scan, Array DFT, PBIST, MBIST, IO DFT, PLL DFT or HVM Reset

  • Contributing and/or being involved with trace pattern generation efforts, as well as post-silicon enabling debug support and/or analysis of the DFT features content types assigned


Minimum Education & Experience

You must possess the below minimum qualifications to be initially considered for this position.  Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates 

  • A Bachelors degree in Electrical or Computer Engineering, or another directly related field, with 5+ years of working experience

Or a

  • A Masters degree in Electrical or Computer Engineering, or another directly related field, with 2+ years of working experience


Your working experience should be in the following 

  • Expertise in at least one of the key DFT features, such as TAP, JTAG, Scan, ATPG or Array DFT, DFx, MBISTPBIST

  • SOC IP DFT design integration or verification

  • EDA Tools knowledge, such as ATPG tools Mentor, Tessent, shell, VCS simulation or debug tools etc.,

  • Silicon enabling debug or test pattern development experience


Preferred Skills and Experience

  • Design automation skill and proficiency in programming or scripting languages, such as C/C++, Python etc.,

  • Structural Design flows including timing routing placement or clocking analysis

  • High Volume Manufacturing requirements and test flows

  • 3D, Media Display graphics pipelines

  • SOC Architecture

Inside this Business Group

Intel Architecture, Graphics, and Software (IAGS) brings Intel's technical strategy to life. We have embraced the new reality of competing at a product and solution levelnot just a transistor one. We take pride in reshaping the status quo and thinking exponentially to achieve what's never been done before. We've also built a culture of continuous learning and persistent leadership that provides opportunities to practice until perfection and filter ambitious ideas into execution.

Other Locations

US, California, Santa Clara;Virtual US and Canada

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here
Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here

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Senior DFT Design Engineer

Folsom, CA 95630

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