Senior CAD Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0185281
Job Description
In this position, you will be working alongside a World-class SoC (System on a Chip) design team within the Xeon Performance Group, delivering next-generation Xeon products and related IPs for Server markets. You will be a key member of the design automation and methodology team and increase the overall efficiency of the team. Your responsibilities will include but not be limited development, automation and execution related to: Enable the team in meeting the design and development targets by working closely with in-house Design Automation experts ; external tool vendors. Interface between global DA experts to establish the design environment with Tools, Flows, Methodologies (TFM) on Digital BackEnd sign off domains - Timing, Physical and Electrical Verification, LEC, DRC, LVS, DFM etc. Continuously work on improving the TFM efficiency and work with Global Design Automation (DA) expert team to incorporate the same. Be one point contact for bugs, issues in TFM for design and development team. Help the team in building PERL/TKL/SKILL scripting to ensure on quality ; faster executions. Understand different methodologies used across different groups in Intel and industry to adopt best practices


Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Candidate must have a Bachelors degree in Electrical/Computer Engineering and 10+ years of industry experience in: - OR - a Masters degree in Electrical/Computer Engineering and 8+ years of experience in: Physical aspect of VLSI designsVLSI design with focus in Design SignOff spaceTCL Python PERL and other scripting languages Preferred Qualifications:APR static timing concept low power methodologyDevices RC delay and AOCVPOCV on 10nm or smaller process nodesDeveloping, executing and debugging in RV, extraction, noise or relevant domainsArchitecting and developing ground up new tools and solutions to meet future XEON processors need Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

Xeon Performance Group (XPG) delivers custom server SoC design solutions to our data center customers. It is chartered to deliver data centric silicon that is high-performing, cost-effective, high-quality, and on schedule in way that increases market share and drives the best solutions for our customers.



Other Locations

US, Massachusetts, Hudson;US, Oregon, Hillsboro



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Senior CAD Engineer

Intel
Santa Clara, CA 95050

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