Summary

Posted: Nov 4, 2020

Role Number:200201355

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has ...Summary

Summary

Posted: Nov 4, 2020

Role Number:200201355

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a visionary and uncommonly talented RTL Design Engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day.

Specify, design, and contribute in the verification and lab bring-up of advanced mixed-signal circuits (digital side).

Key Qualifications

• - Deep knowledge of mixed signal concepts
• - Deep knowledge of RTL design fundamentals
• - Deep knowledge of Verilog and System-Verilog
• - Deep knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers)
• - Working knowledge of synthesis, static timing, DFT is a huge plus
• - Deep knowledge of System-Verilog assertions, checkers, and other design verification techniques
• - Deep knowledge of scripting languages. Perl and Python are plusses
• - Deep knowledge of Algorithm developments
• - Strong communication and presentation skills SERDES knowledge is a plus

In this job you will be responsible for specifying and/or micro-architecting digital blocks in advanced mixed-signal circuits. You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.

Education & Experience

Bachelors or Masters Degree in technical discipline

Additional Requirements