RF/Analog Senior IC Layout Design Engineer

Intel
Phoenix, AZ 85003
  • Job Code
    JR0200866
Job Description

As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry-standard design packages.

About the Role:
We are looking for experienced and highly motivated RF/analog layout design engineer with product quality of tapeout experiences. This role will contribute at every level of layout, from the transistor level to full chip floor planning and top-level interconnects.

Responsibilities will include, but are not limited to:

  • Closely working with analog/RF IC design engineers to finish layout on time with high quality for consumer electronics product.
  • Mentoring junior layout engineers
  • Meeting project milestone and deadlines


Qualifications

You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Requirements

  • Bachelor's Degree in Electrical Engineering or Applicable Field
  • 8+ years of layout experience on related products and technologies
  • VLSI Coursework or industry experience
  • Hands-on experience in layout of various RF/Analog integrated circuits, such as LNA, Mixer, RF VGAs, PA, VCO, PLL, Regulators, ADC/DAC, etc., in deep sub-micron CMOS technologies.
     

Preferred Qualifications

  • Experience on SOC top level integration of digital IPs and customized RF/analog blocks.
  • Strong knowledge on IC layout CAD tools such as Cadence and Virtuoso and Calibre verification (ERC, DRC, LVS) preferred
  • Strong debugging skill on interpreting reports of DRC, ERC, LVS, etc.
  • A thorough understanding of the floor planning on various analog/RF blocks.
  • Experience in DFM hierarchical layout construction for efficient verification and integration.
  • Comprehensive understanding of the target process to balance layout and design needs, e.g. crosstalk, RC delay, electro-migration, IR drop, self-heating, shielding, matching, guard rings and latch up.
  • Excellent communication skills with design engineers
  • Scripting experience in PERL or SKILL CODE
  • Experience with chip level layout
  • Leadership role in previous work

Inside this Business Group

As an integral part of Intel's new IDM2.0 strategy, we establish Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to Intel's CEO. IFS will be a world-class foundry business and a major US and European-based capacity provider to serve customers globally. We differentiate IFS with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, plus a world-class IP portfolio including x86 cores, graphics, media, display, AI, interconnect, fabric, and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions using industry-standard design packages. Intel dedicates IFS to the success of its customers with entire Profit and Loss responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement, and capacity commitments. IFS is already engaged with customers today, starting with our existing foundry offerings. We are expanding imminently to include our most advanced technologies optimized for cutting-edge performance, making them ideal for high-performance applications.



Other Locations

US, Oregon, Hillsboro


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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RF/Analog Senior IC Layout Design Engineer

Intel
Phoenix, AZ 85003

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