Pre-Silicon Validation Engineer

Folsom, CA 95630
  • Job Code
Job Description

Roles and Responsibilities include:

  • Working closely w/ the Architect/Uarchitecture and Validation teams in determining the proper validation strategy for new design
  • Define and provide feedback on specifications, develop Coverage plans, understand high level IP end-to-end flows
  • Review test-bench / codes for efficiency and coverage and drive any paradigm shifts needed in validation methodologies.
  • Actively engage in risk analysis and validation recommendation for product Tape-outs etc.
  • W working across the team boundaries and improving the overall technical bench strength of the organization.
  • Excellent communication and organization skills are critical, along with teamwork, and must demonstrate strong technical leadership skills, passion for design/ tools and methodology and strong influencing skills.
  • Must have strong orientation for Quality and Commit and Deliver and Drive Innovation/efficiencies and have strong strategic thinking to come up w/ paradigm shift solutions to critical design/validation challenges.


You must possess a minimum Bachelors Degree in Computer Engineering, Electrical Engineering or related field, Masters Degree preferred.

  • 4+ years experience in relevant Pre-Silicon validation position and must have gone through multiple project cycles to gather in-depth experience.
  • 4+ years experience in logic design/verification with various tools and methodologies including: System Verilog, Perl, OVM/UVM Validation Methodologies.
  • VCS/Synopsys simulators, Coverage Tools, UPF / Power Mgmt. Validation, Knowledge of DFX Scan.
  • 2+ years experience in PC Architecture.

Preferred Requirements :

  • Knowledge of critical PC IO subsystems (e.g PCIe, USB, SATA, UART, SPI ...)
  • Knowledge of IO controllers and its design validation
  • Knowledge of UPF/ Low Power Validation and Formal verification

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, California, Santa Clara

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Before you go...

Our free job seeker tools include alerts for new jobs, saving your favorites, optimized job matching, and more! Just enter your email below.

Share this job:

Pre-Silicon Validation Engineer

Folsom, CA 95630

Join us to start saving your Favorite Jobs!

Sign In Create Account