Pre-Silicon SOC Validation Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0161231
Job Description

Come join Intels  Xeon Engineering Group (XEG) Group as Pre-Silicon SOC Validation Engineer for both simulation and emulation platforms working on exciting products fueling the data center growth.

We are seeking an experienced validation engineer to work with a diverse team designing Intel's next generation SOCs. We are looking for someone who has passion around improving the way we solve complex problems through the work of the team as wells as their own direct contributions. For this particular job your responsibility will be to develop and integrate SOC Validation infrastructure and models.

In this role, responsibilities include (but not limited to):

  • Participate in development of verification/validation environment of complex design components
  • Defines module interfaces/formats for simulation.
  • Develop and build test benches for design under test. Identify, document and execute test plans on various platforms, develop and debug random constrain verification test suite to fully verify the design under test.
  • Participate in definition of verification/validation infrastructure, and documentation for IP, SoC System on a Chip and system level development
  • Participate in pre-silicon validation of designs which include processor cores and custom logic working together.
  • Strong independence and proven ability to set and meet own goals


Qualifications

Minimum qualifications:
BS degree in Electrical Engineering, Computer Engineering or Computer Science or related field with 4+ years of relevant experience. OR a Masters degree in Electrical/Computer Engineering or Computer Science or related field with 3+ years of experience:

  •  Validation experience with developing and maintaining complex Val IP/SOC environments in UVM and System Verilog, constrained random verification
  • Good understanding of the complete verification life cycle (test plan, testbench  through coverage closure)
  • Knowledge of modern CPU architecture, such as memory cache hierarchy, coherency
  • Knowledge of FPGA and emulation Platforms

 

Preferred Qualifications  

  • Understanding of PCIe and one or more coherent IO protocols and preferably hands on experience in verification of PCIe Controllers and subsystem

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.



Other Locations

US, Oregon, Hillsboro


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Pre-Silicon SOC Validation Engineer

Intel
Santa Clara, CA 95050

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