Pre-Silicon Cluster RTL Verification

Phoenix, AZ 85003
  • Job Code
Job Description

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.


Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Must have at least a BS (MS Preferred) in Electrical Engineering, Computer Engineering, or Computer Science and BS with 4+ years of experience OR MS with 3+ in the validation of ASIC's or IP blocks or SOC's,.

At least 3+ years of experience in: 

- UVM/OVM testbench experience
- Strong background in computer architecture such as pipelined systems, cache subsystems and coherency
- Background and understanding of system architecture such as I/O connectivity and interrupt handling
- Demonstrable experience writing System Verilog
- Programming experience in C++, Perl/Python.
- Familiarity with a range of internal and 3rd-party logic and design verification tools

- Experience with SoC integration and/or verification
- Experience developing testbench components such as: BFMs, monitors, checkers, etc

Behavioral Traits:

Strong analytical ability, problem solving and communication skills
Strong communication and teamwork stills

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Pre-Silicon Cluster RTL Verification

Phoenix, AZ 85003

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