Pre Si Validation Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0178138
Job Description

The world is transforming and so is Intel! 

Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world.

With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver IP solutions for products that impact customers lives? If so, Come join us to do something wonderful!

As part of a Pre-silicon Power Management Validation Team on current and next generation server products, Responsibilities will include but not limited to:

  • Ability to understand/co-relate the IP architecture specs to design implemented to create test plans, coverage, identify gaps in the spec documentation, debug etc for solid validation execution
  • Create testplans, scoreboards, stimulus, drivers etc for power management IP(s) validation
  • Develop/Utilize various tools and/or methodologies with the goal to ensure high quality IP delivery to customer
  • Communicate/Coordinate effectively with validation, design and architecture teams
  • Participate in the debug of customer issues, silicon sightings etc

In addition to the qualifications listed below the ideal candidate will also have:

  • Excellent analytical and problem-solving skills
  • Strong verbal/written communication skills
  • Effective team player with continuous learning mindset
  • Willingness to balance multiple tasks
  • Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process




 


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications
The candidate must have a Bachelors degree in Electrical/Computer Engineering/Computer Science or related computing discipline with 3+ years of experience -OR- a Master's degree in Electrical/Computer Engineering/Computer Science or related computing discipline with 3+ months of experience in:

  • Verilog, System Verilog
  • Digital design
  • Computer architecture
  • Hands on experience in OVM/UVM methodologies
  • Scripting experience in languages like Python, Perl etc


Preferred Qualifications

  • Power Management , DFX knowledge is a plus
  • Strong Object oriented programming based background

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Pre Si Validation Engineer

Intel
Santa Clara, CA 95050

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