Post-Silicon Validation and Debug Engineer

Folsom, CA 95630
  • Job Code
Job Description

If you are passionate about computer graphics and working with leading graphics engineers on Intel's latest GPU/CPU architecture, then our GFX & Throughput Computing Hardware Engineering (GTCHE) team has opportunities for you. As part of the GTCHE team we are passionate about delivering best-in-class visual experiences that enable users to immerse themselves in a new visual future. You will develop graphics, media, display & imaging solutions for a range of platforms from traditional PCs to high end datacenter servers. GTCHE is seeking for Post-Silicon Validation and Debug Engineer for Discrete Graphics SOC [PCIE, HBM Memory Controller, Power Management, Security, DFD Tools, Boot/reset/Clocking Flows] and Graphics, Media , Display domains. In this role you will work closely with architects, software/hardware engineering, Performance/Power teams and simulator experts. If you have the desire and ability to learn quickly and gain new knowledge your potential here is limitless. 

In this position you will help us with the following responsibilities.

  • Create, defines and develops system validation environment and test suites.
  • Uses and applies emulation and platform level tools and techniques to ensure performance to spec.
  • Responsible for the development of methodologies, execution of validation plans, and debug of failures.
  • Require broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Presilicon Validation teams in improving postsilicon test content and providing feedback for future ondie debug features.

Behavioral traits that we are looking for:

  • Strong written and verbal communication skills
  • Strong leadership in driving execution across different functional team
  • Possess strong teamwork, problem-solving and influencing skills along with abilities to work with different geographical locations


Minimum skills and experience that will get you noticed:

Bachelors Degree in Electrical/Computer/Software Engineering , Computer Science or related disciplines with 10+ years of Industry experience. Or a Masters in the same disciplines with 6+ years of Industry experience.

Your experience must be in the following:

  • Validation/verification methodologies (OVM/UVM)
  • Verification languages such as Verilog or SystemVerilog
  • Performing and debugging simulations
  • SoC integration or Computer architecture
  • Executing and debugging test plans on emulation systems (Eg: Cadence Veloce, Synopsys Zebu) and FPGA platforms (like Synopsys HAPS)

Preferred skills and experiences that will make you stand out:

  • RTL design
  • Emulators/FPGA

Inside this Business Group

Intel Architecture, Graphics, and Software (IAGS) brings Intel's technical strategy to life. We have embraced the new reality of competing at a product and solution levelnot just a transistor one. We take pride in reshaping the status quo and thinking exponentially to achieve what's never been done before. We've also built a culture of continuous learning and persistent leadership that provides opportunities to practice until perfection and filter ambitious ideas into execution.

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Post-Silicon Validation and Debug Engineer

Folsom, CA 95630

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