Physical Design Technologist - Principal Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0177156
  • Jobs Rated
    19th
Job Description

Intel's Barefoot Networks makes programming your network as simple as programming your computer. Join us in working on innovative programmable network switches in this Physical Design Technologist role.    As a Principal Engineer in the physical design organization, your key focus will be Power, Performance and Area efficiency improvements with special emphasis on yield improvements.  You will connect your deep understanding of semiconductors device physics, leading edge foundry process nodes, physical design tools, flows and methods to contribute towards strong execution and product roadmap definition .  You will participate in improving existing methods and bring new state-of-art implementation methods for achieving best PPA through physical design excellence. You will use combination of hands-on approach and exposure to high level concepts in Reliability, Power, Timing signoff and Layout to improve overall design choices and target continuous improvement.


Qualifications

Minimum Qualification

  • Masters in EE with 15+ years of experience or PhD in EE with 10+ years experience.

  • 5+ years experience executing  on complex network SOCs/ASICs.

  • Experience working on advanced process nodes such 7nm and below.

  • Good grasp of STA and developing guard bands for desired yield and performance.

  • Deep understanding of physical design tools and concepts such as Innovus/ICC.

  • Directly owned Clock distribution with OCV and STA closure considerations

  • Ability to automate in TCL and Perl to collect data for analysis in physical design environment.

Desired Qualifications

  • Played critical part in defining product roadmaps.

  • Proven track record of influencing new methodologies and successfully steering implementation.

  • Exposure to advanced process nodes.

  • Deep understanding of semiconductor device physics.

  • High Speed IO design/integration such as  DDR/SERDES.

  • Perform Spice simulations. Build custom cells and characterize.

  • Power grid design and analysis.

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.



Other Locations

US, Arizona, Phoenix;US, North Carolina, Raleigh



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

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Physical Design Technologist - Principal Engineer

Intel
Santa Clara, CA 95050

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Physicist
19th2019 - Physicist
Overall Rating: 19/199
Median Salary: $117,220

Work Environment
Very Good
44/220
Stress
Low
78/220
Growth
Good
60/220