Physical Design Engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0193967
Job Description

About the Group:

As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. This business unit is completely dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications.

The Team:

The IFS Foundry Engineering Technology and Customer Engineering team is looking for Physical Design Engineers to help showcase Intel's latest process technology to prospective IFS customers through execution of both customer and Foundry Technology Designs. You will have the opportunity to engage in all aspects of the physical design flow while working in a close-knit, multi-discipline, highly collaborative team.

The Role:

In this role, you will create bottoms up elements of chip design including but not limited to FET, cell, and block level custom layouts, FUBlevel floor plans, abstract view generation, RC extraction and schematic to layout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation, customer polygon editing, autoplace and route algorithms, floor planning, fullchip assembly, packaging, and verification. Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. Schedules, staffs, executes and verifies complex chips development and execution of project methodologies and/or flow developments. Requires expansive knowledge and practical application of methodologies and physical design.

Your responsibilities may include but not be limited to:

  • Collaborating with other teams to improve the IFS design platform and its Ease of Use

  • Performing customer Technology Test Chip, Fullchip Design Planning and Integration

  • RTL Synthesis and APR using both Synopsys and Cadence tool sets.

  • Physical Verification (LVS/DRC/ERC/DFM)

  • Reliability Verification

  • Low Power analysis (UPF and CPF based)

  • Static Timing Analysis.


Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum:

  • Bachelor's degree in Electrical Engineering, Computer Science, Physics, or a related field of study with 6+ years of experience

  • 5+ Experience with the Full Synthesis to GDS Flow

  • 5+ Experience with Timing Analysis Tools

Preferred:

  • Master's degree in Electrical Engineering, Computer Science, Physics, or a related field of study with 3+ years of experience in; (one or more)

  • Fullchip Floorplan/Integration experience
  • Low power, power grid planning/power analysis, verifying RV
  • Clock tree synthesis
  • PPA optimization
  • DFx implementations

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with ARM and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry-standard design packages. This business unit is completely dedicated to the success of its customers with full Profit and Loss responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications.



Other Locations

US, California, Santa Clara;US, Texas, Austin


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Physical Design Engineer

Intel
Folsom, CA 95630

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