Physical Design CAD Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0141257
Job Description

In this position, you will be working alongside a World-class SoC (System on a Chip) design team within the Xeon Performance Group, delivering next-generation Xeon products and related IPs for Server markets. You will be a key member of the design automation and methodology team and increase the overall efficiency of the team.

Your responsibilities will include but not be limited development, automation and execution related to:

  • Enable the team in meeting the design and development targets by working closely with in-house Design Automationexperts & external tool vendors
  • Interface between global DA experts to establish the design environment with Tools, Flows, Methodologies (TFM) on Digital BackEnd domains - APR/PnR, Synthesis, Timing, Physical and Electrical Verification, LEC, DRC, LVS etc
  • Continuously work on improving the TFM efficiency and work with Global Design Automation (DA) expert team to incorporate the same
  • Be one point contact for bugs, issues in TFM for design and development team
  • Help the team in building PERL/TKL/SKILL scripting to ensure on quality & faster executions
  • Understand different methodologies used across different groups in Intel and industry to adopt best practices


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Minimum Qualifications

The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 6+ years of experience -OR- a Master's degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience in:

  • VLSI Design Automation and Development
  • RTL2GDS including Synthesis and Place-Route, Physical/Electrical Verification, Timing, LEC, LVS/DRC etc
  • Programming and software development in one of tcl/tk, python, perl

Preferred Qualifications


1+ years of experience in:

  • RTL/Logic design Verilog, VCS, etc.
  • Electronic Design Automation tools, flows and methodology
  • ICCDP, Design Compiler, IC Compiler/ICC
  • Primetime, VCS, Verilog Layout cleanup expertise DRCs, density, ipc, etc.
  • Circuit design Computer architecture TCL, Perl and/or C++ programming
  • Familiarity with tools like spyglass LINT, CDC, DC, LEC, VCLP, Calibre, Fishtail, Power Artist, scan tools
  • Working with EDA vendors and resolving design tool issues

Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intels leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Other Locations

US, Colorado, Fort Collins;US, Massachusetts, Hudson



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$130,020.00-$195,420.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

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Physical Design CAD Engineer

Intel
Santa Clara, CA 95050

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