PCIe System Validation Engineer

San Jose, CA 95113
  • Job Code
Job Description

Intel is a global leader, creating world-changing technology that enables progress and enriches live. We are at the intersection of several technology inflections artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology.

As part of Intels Programmable Sol  utions Group (PSG), the Platform Validation Team plays a key role in both pre-silicon and post-silicon security assurance and validation. We are responsible for validating all of PSGs products with renewed focus on making these products compliant to Intel Security and standards. We are looking for an enthusiastic PCIe System Validation Engineer interested in working with Intel's latest cutting-edge technology.

As the ideal candidate, you will be responsible for the following:

  • Creating, defining, and developing system validation environment and test suites for evolving PCIe protocol validation
  •  Using and applying system level tools and techniques to ensure functionality to specification
  • Development of methodologies, execution of validation plans, and debug of failures
  • Command a broad understanding of high-speed IP validation and requires interfacing with architecture, design and IP teams
  • Collaboration with Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on die debug features
  • You will be involved in PCIe IP validation in the context of System level use cases for high-speed FPGA devices
  • Driving exploration of IP validation methodology, platform and infrastructure enablement to improve process and efficiency


Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Education Requirement

Bachelors Degree in Electrical Engineering or related field

Minimum Qualifications

6+ years of experience in the following areas:

  • Expertise in PCIe protocol (Gen3, Gen4, Gen5), PCIe Host systems, PCIe IP bring up and validation
  • Create test scripts for all validation purposes - link disable/enable, speed change, resets and stability tests
  • Experience in PCIe Link equalization algorithm, architecture and DFD
  • Experience in post silicon validation methodologies and experience in handling PCIe protocol analyzer and processing the data dump
  • Experience in FPGA architecture/design/validation is an added advantage
  • Experience in developing programming languages such as tcl, python, C-programming
  • Experience in handling various high-speed test and measurement equipment such as ATE tester, high bandwidth real time/sampling oscilloscope, high frequency pulse/signal, power supplies

Preferred Qualifications

               Masters degree in Electrical Engineering or related field

This position is not eligible for Intel immigration sponsorship.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, California, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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PCIe System Validation Engineer

San Jose, CA 95113

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