Packaging Research and Development Engineer

Intel
Phoenix, AZ 85003
  • Job Code
    JR0196961
Job Description

Become a part of Intel's Advance Packaging Team by joining the Substrate Packaging Technology Development (SPTD) organization. Our mission is to be the supplier of choice for leading and affordable substrate packaging. Join the SPTD organization to assist in achieving our mission and continuing to make this a great place to work.

Substrate Packaging Technology Development (SPTD) Microelectronic Packaging Research and Development (R and D) Engineers enable substrate and packaging technologies for development of new materials, equipment, process flows and process improvements.

Responsibilities will include, but are not be limited to:


- Innovation, problem solving, development and continuous improvement of equipment and processes through application of experimental design and statistical methods.
- IC substrate process and equipment development, including application of novel concepts in manufacturing technology solutions for next-generation devices.
- Process and equipment specification development, application of principles for design of experiments and data analysis - in addition to planning and documentation of improvements through the change control process.
- The training of additional engineers and technicians to facilitate technology and process transfer to other factories worldwide for High Volume Manufacturing (HVM).

The ideal candidate should exhibit the following behavioral traits and/or skills:


- Written and verbal communication skills.
- Problem-solving, analytical and troubleshooting abilities.
- Flexibility in changing priorities and responsibilities to support business needs.
- Tolerance for ambiguity in a fast-paced, constantly changing product roadmap environment.
- Self-initiated, action-oriented with the willingness to work independently.
- Participation and a sense of ownership; frequent floor presence and interaction with manufacturing personnel.
- Demonstrate technical innovation and delivered results for complex, time-critical technical projects.
- Willingness to apply fundamental science and engineering concepts in development to create novel solutions.

This is an entry level position and compensation will be given accordingly.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
Knowledge and/or experience listed below would be obtained through a combination of your school work and/or classes and/or research and/or relevant previous job and/or internship experiences .

Minimum qualifications:

- Candidate must possess a PhD degree with 1+ years of experience in Materials Science Engineering, Chemical Engineering, Mechanical Engineering, Electrical Engineering, Physics, Chemistry or a related field.

Must have required degree or expect required degree in August 2022.

1+ years of experience in interfacial adhesion (preferably metal-organic interfaces)

Preferred qualifications:

1+ years of experience in the following:


- Experience in metal surface treatments and/or PVD/CVD (Physical/Chemical Vapor Deposition) based thin film deposition techniques.
- Ability to model, design, test and apply conditions to achieve targeted output requirements for metal surface treatments and/or PVD/CVD thin film applications.
- Knowledge in material structure-property relations, polymer and/or metal and/or composite material mechanical properties, solid mechanics, organic chemistry, organic composites and polymer chemistry and/or physics.
- Detailed knowledge of some or all of the following: optical microscopy, electron microscopy (SEM, FIB, TEM, EBSD), analytical techniques (FTIR, Raman, TGA, DSC), Surface analysis (XPS, TOF-SIMS), EDS, AFM, XRD, mechanical cross-sections and other package-level failure analysis techniques.
- Experience with statistical data analysis, JMP/JSL, machine learning.
- Experience in process and equipment development for applications in the Integrated Circuit (IC), packaging or Printed Circuit Board (PCB) industry.
- Understanding of semiconductor and/or IC substrate fabrication processes and technology.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Packaging Research and Development Engineer

Intel
Phoenix, AZ 85003

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