NVM TD Device Integration engineer

Santa Clara, CA 95050
  • Job Code
Job Description
Non-Volatile Memory Device and Integration engineers are responsible for leading research and development in order to architect, develop and deliver leading edge nonvolatile memory technologies to high volume manufacturing. They contribute to defining process and device architectures, technology collaterals as well as develop scaling paths for leading edge memory technologies. The scope includes development of new types of process and device architectures involving novel materials, structures and integration schemes to deliver industry leadership in density, performance, reliability and cost. They collaborate with technology development partners in defining goals, developing the vision, aligning strategy and driving fast paced silicon development to meet aggressive technology node cadences. In addition they work closely with the product and system teams to ensure seamless integration of the memory components into Intel's system products as well as with the manufacturing fabs to ensure a seamless technology transfer and ramp to support the full envelope of component and system products.The device integration engineer will be responsible for CMOS transistor development, optimization, and usage in high-speed memory technologies to extend Intel's lead in NVM performance, cost, and quality. The individual will work effectively with diverse stakeholders such as design, product, integration, yield enhancement and process engineering groups to resolve CMOS device related issues, understand interactions with the memory array, and help in successful transfer to high volume manufacturing.


Must be knowledgeable in CMOS device physics, process flow, and device optimization techniques. Direct experience with test structure design and bench characterization is required. Need to be able to design experiments and analyze CMOS related parametric/probe data to troubleshoot and optimize product performance and yield. Should be familiar with spice model generation and corner methodology. Strong communication and influencing skills are also required.This position requires Ph.D. degree and 3+ years of experience or a Master's degree with 6+ years of experience. The degree should be in Electrical Engineering or related science disciplines.Additional Qualifications include:- Demonstrate experience in technical problem solving capability and good teamwork, leadership and communication skills- Demonstrate expertise in semiconductor device physics, process integration, fabrication and characterization techniques- Understand the technology challenges and process changes for new parts and their impact on part performance- Skilled in data analysis tools JMP, Excel, etc. and techniques- Strong knowledge of DOE principles and analytical thinking skills- Ability to work with a cross-disciplinary team of external and internal partners

Inside this Business Group

Non-Volatile Solutions Memory Group:  The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices.  The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.

Other Locations

US, California, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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NVM TD Device Integration engineer

Santa Clara, CA 95050

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