Memory Design Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0184078
Job Description

The world is transforming and so is Intel! 

Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world.

With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver IP solutions for products that impact customers lives? If so, Come join us to do something wonderful!

Component Design Engineers are responsible for the design and development of electronic components.

Responsibilities may include but not limited to:

  • Design of chip layout circuit design, circuit checking, device evaluation and characterization, documentation of specifications, prototype construction and checkout, modification and evaluation of semiconductor devices and components, performing developmental and/or test work,
  • Reviewing product requirements and logic diagrams, planning and organizing design projects or phases of design projects.
  • Responds to customer/client requests or events as they occur.
  • Develops solutions to problems utilizing formal education and judgement.

In addition to the qualifications listed below the ideal candidate will also have:

  • Excellent analytical and problem-solving skills
  • Strong verbal/written communication skills
  • Effective team player with continuous learning mindset
  • Willingness to balance multiple tasks
  • Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must have a Bachelor's degree in Electrical Engineering with 4+ years of experience -OR- a Master's degree in Electrical Engineering with 2+ years of experience -OR- a PhD in Electrical Engineering with 1+ years of experience in:

  • Memory compiler and/or custom/macro design in advanced technology nodes (10nm and below), fluency in related tools/methodologies ( simulations, extraction, timing, reliability, etc. )
  • Memory test chips and testing insights, familiarity with memory DFT and MBIST, post-Si data analysis
  • Memory technology scaling insights in advanced technology nodes, familiarity with DTCO

Preferred Qualifications:

  • Memory IP test architecture features required at memory IP and SOC test chip level
  • Post-Si characterizing debugging IP and analysis of design margin sensitivity to process
  • Technology assessments with focus on memory circuits and their optimizations
  • Relevant publications or patents

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Memory Design Engineer

Intel
Santa Clara, CA 95050

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